PageOutline
General Terminlogy

• L1 sync -- The synchronous side of the Layer 1, triggered by the TDMA frame interrupt issued by the DSP
• L1 async -- The asynchronous side of the Layer 1, driven by the L2/L3

Files

=== Layer1/L1i/Src/dl1_mem.c ===

allocating/receiving/sending signals.

=== Layer1/L1i/Src/dl1_pei.c ===

create/initialise/close protocol stack entity

=== Layer1/L1c/Src/l1_afunc.c ===

Functionality related bit and timeslot synchronization

=== Layer1/L1c/Inc/l1_defty.h ===

DSP shared memory API definitions

=== Layer1/L1c/Src/l1_sync.c ===

Code driven by TDMA frame interrupt as issued by DSP

Functions

=== Frame/Src/Frame.c:pf_ProcessSystemPrim(USHORT TaskHandle, T_VOID_STRUCT *pPrim) ===

called from Frame/Src/vsi_com.c:vsi_c_primitive(), in turn from Layer1/L1i/Src/dl1_mem.c:os_receive_sig(UWORD8 queue)
whenever the Layer1 receives a Signal.

=== Layer1/L1i/Src/dl1_pei.c:pei_run(T_VSI_CHANDLE handle) ===

process primitives, called by main loop in the protocol stack entity

=== Layer1/L1c/Src/l1_async.c:l1a_task() ===

{{{
/* L1A (Layer 1 Asynchronous) task function. This /
/ function manages the interface between L3 and L1. It /
/ is composed with a set of state machine, each machine /
/ handles a particular GSM functionality. When a /
/ message is received in L1_C1 message queue, it is /
/ submitted to every state machine. The one which are /
/ impacted by the message process it. At the end of /
/ "l1a_task()" function, a balance routine is called, /
/ it enables L1S tasks consequently to the state machine*/
/* requests. */
}}}

• iterates over list of primitives, call l1pa_task()

=== Layer1/L1c/Src/l1p_asyn.c:l1pa_task(xSignalHeaderRec *msg) ===

call into the various lapa_*_process() functions for GPRS

=== layer1 asynchronous ===

==== l1a_test_process() ====

Hardware test

==== l1a_stats_process() ====

Statistics or Test process

==== l1a_mmi_adc_req() ====

ADC conversion

==== l1a_freq_band_configuration() ====
Frequency Band configuration: GSM900, E-GSM900, DCS1800, DUAL, DUALEXT, PCS 1900 {{{
/* Description : This state machine handles the frequency*/
/*band configuration: E_GSM900, GSM900, DCS1800, PCS1900,*/
/*DUAL, DUALEXT, DUALEXT_PCS1900... /
/ /
/ Starting messages: MPHC_INIT_L1_REQ /
/ /
/ Result messages (input): none /
/ Result messages (output): MPHC_INIT_L1_CON /
/ Reset messages (input): none */
}}}

==== l1a_initial_network_sync_process() ====

Synchronization with a Neighbour cell for Cell Selection {{{
/* Description : This state machine handles the 1st /
/ synchronization with the network. /
/ /
/ Starting messages: MPHC_NETWORK_SYNC_REQ /
/ /
/ Result messages (input): L1C_FB_INFO /
/ L1C_SB_INFO /
/ /
/ Result messages (output): MPHC_NETWORK_SYNC_IND /
/ /
/ Reset messages (input): MPHC_STOP_NETWORK_SYNC_REQ /
/ (MPHC_STOP_NETWORK_SYNC_CON) */
}}}

==== l1a_network_lost() ====

lost Network

==== l1a_full_list_meas_process() ====

Full list receive level monitoring {{{
/* Description: /
/ ------------ /
/ This function is a state machine which handles the /
/ Cell Selection Full List Power Measurement L1/L3 /
/ interface and it handles the neigbour cell /
/ measurement process in IDLE mode with FULL list. /
/ When a message MPHC_RXLEV_REQ is received /
/ the L1S task FSMS_MEAS is enabled. When this task /
/ is completed a reporting message L1C_VALID_MEAS_INFO /
/ is received and forwarded to L3. /
/ /
/ Starting messages: MPHC_RXLEV_REQ. /
/ /
/ Result messages (input): L1C_VALID_MEAS_INFO /
/ /
/ Result messages (output): MPHC_RXLEV_IND /
/ /
/ Reset messages (input): none /
/ /
/ Stop message (input): MPHC_STOP_RXLEV_REQ /
/ /
/ Stop message (output): MPHC_STOP_RXLEV_CON /
/ /
/ Rem: /
/ ---- /
/ L3 is in charge of the number of pass to follow the /
/ GSM recommendation. */
}}}

==== l1a_idle_ba_list_meas_process() ==== {{{
/* Description : This state machine handles neigbor cell /
/ measurement process in IDLE mode with BA list. /
/ /
/ Starting messages: MPHC_RXLEV_PERIODIC_REQ /
/ ------------------ /
/ L1 starts then the periodic BA list receive level /
/ monitoring. /
/ /
/ Subsequent messages: MPHC_RXLEV_PERIODIC_REQ /
/ -------------------- /
/ L1 changes the BA list and starts the periodic BA /
/ list receive level monitoring with this new list. /
/ /
/ Result messages (input): L1C_RXLEV_PERIODIC_DONE /
/ ------------------------ /
/ This is the periodic reporting message from L1s. /
/ /
/ Result messages (output): MPHC_RXLEV_PERIODIC_IND /
/ ------------------------- /
/ This is the periodic reporting message to L3. /
/ /
/ Reset messages (input): MPHC_STOP_RXLEV_PERIODIC_REQ*/
/* ----------------------- /
/ BA list neigbor cell measurement process in IDLE /
/ is stopped by this message. */
}}}

==== l1a_idle_6strongest_monitoring_process() ====

6 strongest Neighbor cells synchro. monitoring {{{
/* Description: /
/ ------------ /
/ This function is a state machine which handles the /
/ synchronization with up to 6 neighbor cells /
/ /
/ Starting messages: MPHC_NCELL_SYNC_REQ /
/ ------------------ MPHC_NCELL_LIST_SYNC_REQ /
/ L1 makes an attempt to read the FB/SB or to confirm /
/ SB. /
/ /
/ /
/ Result messages (input): L1C_FB_INFO /
/ ------------------------ L1C_SB_INFO /
/ L1C_SBCONF_INFO /
/ Result messages from L1S. FB detection, SB detection,*/
/* SB confirmation. /
/ /
/ Result messages (output): MPHC_NCELL_SYNC_IND /
/ ------------------------- /
/ SB indication. /
/ /
/ Reset messages (input): MPHC_STOP_NCELL_SYNC_REQ /
/ ----------------------- (MPHC_STOP_NCELL_SYNC_CON) */
}}}

==== l1a_neighbour_cell_bcch_reading_process() ====

6 strongest Neighbor cells BCCH reading {{{
/* Description: /
/ ------------ /
/ This function is a state machine which handles the /
/ BCCH reading from up to 6 neighbour cells /
/ /
/ Starting messages: MPHC_NCELL_BCCH_REQ /
/ ------------------ /
/ /
/ Result messages (input): L1C_BCCHN_INFO /
/ ------------------------ /
/ /
/ Result messages (output): MPHC_NCELL_BCCH_IND /
/ ------------------------- /
/ /
/ Reset messages (input): MPHC_STOP_NCELL_BCCH_REQ /
/ ----------------------- (MPHC_STOP_NCELL_BCCH_CON) */
}}}

==== l1a_idle_serving_cell_bcch_reading_process() ====

Serving Cell BCCH reading {{{
/* Starting messages: MPHC_SCELL_NBCCH_REQ /
/ ------------------ MPHC_SCELL_EBCCH_REQ /
/ /
/ L1 continuously reads the serving cell BCCH and/or /
/ Extended BCCH as requested by the scheduling info. /
/ /
/ Result messages (input): L1C_BCCHS_INFO /
/ ------------------------ /
/ System information data block from L1S. /
/ /
/ Reset messages (input): MPHC_STOP_SCELL_BCCH_REQ /
/ ----------------------- (MPHC_STOP_SCELL_BCCH_CON) */
}}}

==== l1a_idle_serving_cell_paging_process() ====

Serving Cell PAGING reading {{{
/* Description : This state machine handles paging /
/ /
/ Starting messages: MPHC_START_CCCH_REQ /
/ ------------------ /
/ /
/ L1 continuously reads the serving cell BCCH and/or /
/ Extended BCCH as requested by the scheduling info. /
/ /
/ Result messages (input): L1C_ALLC_INFO /
/ ------------------------ L1C_NP_INFO /
/ L1C_EP_INFO /
/ /
/ Reset messages (input): MPHC_STOP_CCCH_REQ /
/ ----------------------- (MPHC_STOP_CCCH_CON) */
}}}

==== l1a_idle_smscb_process() ====

Short Message Servive Cell Broadcast reading {{{
/* Description : This state machine handles the SMSCB /
/ (Short Message Service Cell Broadcast). /
/ /
/ Starting messages: MPHC_CONFIG_CBCH_REQ /
/ /
/ Subsequent messages: MPHC_CBCH_SCHEDULE_REQ /
/ MPHC_CBCH_INFO_REQ /
/ MPHC_CBCH_UPDATE_REQ /
/ /
/ Result messages (input): L1C_CB_INFO /
/ /
/ Result messages (output): MPHC_DATA_IND /
/ /
/ Reset messages (input): MPHC_STOP_CBCH_REQ /
/ */
}}}

==== l1a_cres_process() ====

Cell reselection process

Synchronization and requested BCCH reading --> camp on new cell

{{{
/* Description: /
/ ------------ /
/ This function is a state machine which handles Cell /
/ Reselection. /
/ /
/ Starting messages: MPHC_NEW_SCELL_REQ /
/ ------------------ /
/ L1 camps on the given ARFCN. /
/ /
/ Result messages (output): MPHC_NEW_SCELL_CON */
}}}

==== l1a_access_process() ====

Link Access Process. {{{
/* Description : This state machine handles the access /
/ to the network while in IDLE mode. /
/ /
/ Starting messages: MPHC_RA_REQ /
/ /
/ Subsequent messages: MPHC_RA_REQ /
/ /
/ Result messages (input): L1C_RA_DONE /
/ /
/ Result messages (output): MPHC_RA_CON /
/ /
/ Reset message (input): MPHC_STOP_RA_REQ /
/ /
/ Reset message (input): MPHC_STOP_RA_CON */
}}}

==== l1a_dedicated_process() ====

Dedicated mode process {{{
/* Description : This state machine handles the dedicated*/
/* mode setup (L1A side). /
/ /
/ Starting messages: MPHC_IMMED_ASSIGN_REQ /
/ /
/ Subsequent messages: MPHC_CHANNEL_ASSIGN_REQ /
/ MPHC_SYNC_HO_REQ /
/ MPHC_PRE_SYNC_HO_REQ /
/ MPHC_PSEUDO_SYNC_HO_REQ /
/ MPHC_ASYNC_HO_REQ /
/ MPHC_ASYNC_HO_COMPLETE /
/ MPHC_HANDOVER_FAIL_REQ /
/ MPHC_CHANGE_FREQUENCY /
/ OML1_CLOSE_TCH_LOOP_REQ /
/ OML1_OPEN_TCH_LOOP_REQ /
/ OML1_START_DAI_TEST_REQ /
/ OML1_STOP_DAI_TEST_REQ /
/ /
/ Result messages (input): L1C_DEDIC_DONE /
/ L1C_SACCH_INFO /
/ /
/ Result messages (output): MPHC_CHANNEL_ASSIGN_CON /
/ MPHC_SYNC_HO_CON /
/ MPHC_PRE_SYNC_HO_CON /
/ MPHC_PSEUDO_SYNC_HO_CON /
/ MPHC_ASYNC_HO_CON /
/ MPHC_TA_FAIL_IND /
/ MPHC_DATA_IND /
/ OML1_CLOSE_TCH_LOOP_CON /
/ OML1_OPEN_TCH_LOOP_CON /
/ OML1_START_DAI_TEST_CON /
/ OML1_STOP_DAI_TEST_CON /
/ /
/ Reset messages (input): MPHC_CHANNEL_RELEASE */
}}}

==== l1a_dedic6_process ====

6 strongest Neighbor cells synchro. monitoring and BCCH reading {{{
/* Description : This state machine handles the 6 strong.*/
/* neighbor cells management in dedicated mode. /
/ /
/ Remark: in dedicated mode there is no reason to use /
/ the task parameters semaphores since there is no /
/ ambiguity and no asynchronous/synchronous conflict to /
/ care about. /
/ /
/ Starting messages: L1C_DEDIC_DONE /
/ /
/ Result messages (input): L1C_FB_INFO /
/ L1C_SB_INFO /
/ L1C_SBCONF_INFO /
/ /
/ Reset messages (input): MPHC_CHANNEL_RELEASE */
}}}

=== layer 1 synchronous ===

==== Layer1/L1c/Src/l1_sync.c:hisr() ====

Interrupt Service Routine called by the DSP TDMA frame interrupt * Calls l1s_synch()

==== Layer1/L1c/Src/l1_sync.c:l1s_synch() ==== {{{
/* This function is the core of L1S. Here is a summary /
/ of the execution: /
/ /
/ - Frame counters management. /
/ - Get current communication page pointers. /
/ - RESET internal variables. /
/ - RESET MCU->DSP DB communication page. /
/ - TOA update management. /
/ /
/ - L1 task manager, /
/ - Dedicated_mode_manager. /
/ - Task_scheduler. /
/ - Execute_frame. /
/ - Neighbor cells measurement manager. /
/ - End manager. */
}}}

==== l1s_dedicated_mode_manager() ====

• assignment of a new channel, changing channel mode, ciphering start, etc.

==== l1s_task_scheduler_process() ==== {{{
/* This function is the task scheduler of L1S. It /
/ schedules any enabled task. When a task must start, /
/ it becomes PENDING. Since several tasks can become /
/ pending at the same time, the highest priority one /
/ is elected. The elected task compete then with the /
/ current running task. If they conflict, the highest /
/ priority one wins. If the winning is the new comer /
/ then the multiframe table is reset and the new coming /
/ task is installed. */
}}}

==== l1s_execute_frame() ==== * call l1s_exec_mftab()

==== Layer1/L1c/Src/l1_mfmgr.c:l1s_exec_mftab() ==== * Execute functions from MFTAB
FIXME

==== l1s_meas_manager() ==== {{{
/* Description: /
/ ------------ /
/ This function is the measurement tasks manager. /
/ The followings tasks are handled: /
/ /
/ FSMS_MEAS: /
/ 1) Full list measurement in Cell Selection /
/ The machine performs 1 valid measurement per carrier /
/ from the full list of GSM carriers. To achieve 1 /
/ valid measurement, 2 attempt with 2 different AGC /
/ are performed worst case. When all carriers are /
/ a reporting message L1C_VALID_MEAS_INFO is built and /
/ sent to L1A. /
/ /
/ 2) Full list measurement in Idle mode. /
/ The machine performs 1 valid measurement per carrier /
/ from the full list of GSM carriers. To achieve 1 /
/ valid measurement, 2 attempt with 2 different AGC /
/ are performed worst case. When all carriers are /
/ a reporting message L1C_VALID_MEAS_INFO is built and /
/ sent to L1A. /
/ /
/ I_BAMS_MEAS: BA list measurement in Idle mode. /
/ The machine performs 7 measurements per PCH reading /
/ (3*2+1) looping on the BA list. When 7 measurements are /
/ completed (end of PCH) a reporting message /
/ L1C_RXLEV_PERIODIC_DONE is built and sent to L1A. */
}}}

==== l1s_end_manager() ==== * copy page into real time trace buffer

==== l1s_increment_time() ==== * Increament the various framenumbers by one

=== DSP Tasks === {{{
#define HWTEST 0 // DSP checksum reading
#define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode
#define DEDIC 2 // Global Dedicated mode switch
#define RAACC 3 // Channel access (ul)
#define RAHO 4 // Handover access (ul)
#define NSYNC 5 // Global Neighbour cell synchro switch
#define POLL 6 // Packet Polling (Access)
#define PRACH 7 // Packet Random Access Channel
#define ITMEAS 8 // Interference measurements
#define FBNEW 9 // Frequency burst search (Idle mode)
#define SBCONF 10 // Synchro. burst confirmation
#define SB2 11 // Synchro. burst read (1 frame uncertainty / SB position)
//#define PTCCH 12 // Packet Timing Advance control channel CCR 9-12-02 BUG02527
#define FB26 12 // Frequency burst search, dedic/transfer mode MF26 or MF52
#define SB26 13 // Synchro burst search, dedic/transfer mode MF26 or MF52
#define SBCNF26 14 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52
#define FB51 15 // Frequency burst search, dedic mode MF51
#define SB51 16 // Synchro burst search, dedic MF51
#define SBCNF51 17 // Synchro burst confirmation, dedic MF51
#define PDTCH 18 // Packet Data channel
#define BCCHN 19 // BCCH Neighbor in GSM Idle
#define ALLC 20 // All CCCH Reading
#define EBCCHS 21 // Extended BCCH Serving Reading
#define NBCCHS 22 // Normal BCCH Serving Reading
#define SMSCB 23 // CBCH serving Reading
#define ADL 24 // SACCH DL
#define AUL 25 // SACCH UL
#define DDL 26 // SDCCH DL
#define DUL 27 // SDCCH UL
#define TCHD 28 // Dummy for TCH Half rate
#define TCHA 29 // SACCH
#define TCHTF 30 // TCH Full rate
#define TCHTH 31 // TCH Half rate
#define PALLC 32 // All PCCCH reading
#define PSMSCB 33 // CBCH serving Reading while in Packet Idle
#define PBCCHS 34 // PBCCH serving reading
#define PNP 35 // Packet Normal paging Reading
#define PEP 36 // Packet Extended paging Reading
#define SINGLE 37 // Single Block for GPRS
#define PBCCHN_TRAN 38 // Packet BCCH Neighbor in Packet Transfer mode.
#define PBCCHN_IDLE 39 // Packet BCCH Neighbor in Idle mode.
#define BCCHN_TRAN 40 // BCCH Neighbour in Packet Transfer mode
#define NP 41 // Normal paging Reading
#define EP 42 // Extended paging Reading
#define BCCHN_TOP 43 // BCCH Neighbour TOP priority in Idle mode
#define PTCCH 44 // Packet Timing Advance control channel
#define SYNCHRO 45 // synchro task: L1S reset
#define PTS_START_TX_BURST_TEST 46 // PTS transmission test
#define PTS_START_RX_BURST_TEST 47 // PTS receive test
#define PTS_START_FB_BURST_TEST 48 // PTS frequency burst receive test
#define PTS_START_FB26_BURST_TEST 49 // PTS frequency burst receive test
#define PTS_START_SB26_BURST_TEST 50 // PTS frequency burst receive test
}}}

=== DSP Driver (l1_drive.c) ===

==== l1ddsp_load_monit_task(API monit_task, fb_mode) ====

• monit_taks = number of measurements (max 8) + sometimes 0x200
• set FB detection algorithm

==== l1ddsp_load_txpwr(u8 vp_TxPower, u16 vp_Arfcn) ====

==== l1ddsp_load_rx_task(API rx_task, UWORD8 burst_id, UWORD8 tsq) ====

Load values into l1s_dsp_com.dsp_db_w_ptr: * d_task_d = rx_task * d_burst_d = burst_id * d_ctrl_system |= tsq << B_TSQ

==== l1ddsp_load_ra_task(API ra_task) ==== * d_task_ra = ra_task

==== l1ddsp_load_tch_mode(UWORD8 dai_mode, BOOL dtx_allowed) ====

==== l1ddsp_load_tch_param() ====

==== l1ddsp_load_ciph_param(UWORD8 a5mode, T_ENCRYPTION_KEY *ciph_key) ====
Set * l1s_dsp_com.dsp_ndb_ptr->d_a5mode = a5mode * l1s_dsp_com.dsp_ndb_ptr->a_kc

==== l1ddsp_stop_tch() ====
Set * l1s_dsp_com.dsp_db_w_ptr->d_ctrl_tch |= (B_STOP_TCH_UL|B_STOP_TCH_DL)

==== l1ddsp_end_scenario() ====

• l1s_dsp_com.dsp_w_page
• l1s_dsp_com.dsp_ndb_ptr->d_dsp_page
• call l1dmacro_set_frame_it()

==== l1dmacro_set_frame_it() ====

Enable GSM Frame Interrupt on next TDMA frame

Typically called at the end of processing a TDMA frame interrupt

==== l1d_reset_hw(UWORD32 offset_value) ====

=== TPU Macros (Layer1/L1d/src/l1d_Tpu.hm) ===

==== MC_L1D_TPU_REWIND ====
Re-initialize the global current TPU pointer to L1D_TPU_RAM.

==== MC_L1D_TPU_SLEEP ====
Sleep for one TPU tick (instruction 0)

==== MC_L1D_TPU_MOVE(addr,data) ====
Put a MOVE instruction at the current TPU pointer

==== MC_L1D_TPU_AT(time) ====
Put an AT instruction at the current TPU pointer

==== MC_L1D_TPU_SYNC(time) ====
Put a SYNC instruction at the current TPU pointer

==== MC_L1D_TPU_WAIT(time) ====
Put a WAIT instruction at the current TPU pointer

==== MC_L1D_TPU_OFFSET(time) ====
Put a OFFSET instruction at the current TPU pointer

==== MC_L1D_TSP_ACT_INIT(signal) ==== * set v_L1d_TspActValue signal * issue MC_L1D_TPU_MOVE instructions for L1D_TSP_ACTX and L1D_TSP_ACT

== MC_L1D_TSP_ACT_SET(signal) ==== * set v_L1d_TspActValue |= signal * issue MC_L1D_TPU_MOVE instructions as required

==== MC_L1D_TSP_ACT_RESET(signal) ==== * unset v_L1d_TspActValue |= signal * issue MC_L1D_TPU_MOVE instructions as required

=== TPU (Layer1/L1d/src/l1d_Tpu.c) ===

==== TP_Reset(u16 on) ==== * Issue L1D_TPU_CTRL_RESET in L1D_TPU_CTRL register * Wait until reset has been asserted

==== TP_Enable(u16 on) ==== * Set or unset L1D_TPU_CTRL_T_ENBL in L1D_TPU_CTRL

==== l1dmacro_idle(void) ====

==== l1dmacro_offset(u32 offset_value, s32 relative_time) ====

==== l1dmacro_synchro(u32 when, u32 value) ====

==== TPU_ClkEnable(SYS_UWORD16 on) ==== * Set or unset L1D_TPU_CTRL_CLK_EN in TPU_CTRL * wait until change becomes active

==== TPU_FrameItEnable(void) ==== * Enable Frame interrupt by TPU_CTRL_D_ENBL in TPU_CTRL

==== l1dmacro_set_frame_it(void) ==== * Call TPU_FrameItEnable()

==== l1pdmacro_it_dsp_gen(WORD16 time) * MC_L1D_TPU_AT (time); * MC_L1D_TPU_MOVE (L1D_TPU_IT_DSP_PG,0x0001);

==== l1pdmacro_anchor(WORD16 time) * MC_L1D_TPU_AT (time);

==== TPU_check_IT_DSP(void) ==== * check if an IT DSP is still pending

=== RF Frontend Driver ===

==== l1d0_0ActivateTx (u16 vp_Start, u8 vp_TxPwr, u8 vp_Band) ====
Activate TX path of the radio section to transmit a burst

==== l1d0_1DeactivateTx (u16 vp_Start, u8 vp_TxPwr, u8 vp_Band) ====

==== l1d0_2CalcArfcnNcntValue(u16 vp_Arfcn, u8 vp_TxRx, u8 vp_Band) ====
Calculate N-Counter for RF-PLL

==== l1d0_3BuildGainReg(u16 vp_Arfcn, u8 vp_Band, t_L1d_Level *pp_Level) ====
Calculate AGC register prior to Rx

==== l1d0_4DeactivateRx(u16 vp_Start) ====
Deactivate Radio Rx power control paths

==== l1d0_6RxWinCtrl(u16 vp_Arfcn, u8 vp_WinId, t_L1d_Level *pp_level, u8 vp_Fb26SpecialCase) ====
Program everything on Vega & LMX for TX path

==== l1d0_7TxWinCtrl(u16 vp_Arfcn, u8 vp_WinId, u8 vp_TxPwr) ====
Programs everything on vega & LMX for TX path except power ramping

==== l1d0_8ILToGain(u16 vp_Arfcn, u8 vp_Band, t_L1d_Level *pp_level) ====
Computes the various gains to be programmed in the LMX3411 RF chip according to the expected input level at the antenna

==== l1d0_13ActivateRx (u16 vp_Start, u8 vp_Band) ====
Activate the Radio Rx path

==== l1d0_15RfInit(void) ====
Initialization routine for RF

==== l1d0_16ProgRfArfcn(u16 vp_Arfcn, u8 vp_TxRx, u8 vp_Band) ====
Program RF synthesizer N-Counter

==== l1dmacro_reset_hw(u32 vp_ServingCellOffset) ====
Reset and set OFFSET register serving cell offset

==== l1dmacro_init_hw(void) ====
Reset VEGA, then remove reset & Init RF synthesizers

==== l1d_GenerateLMXRCountRegister(u8 vp_Band, u8 vp_TxRx) ====
Creates R counter register for LMX

Data Structures

=== l1s (Layer1/L1c/Inc/l1_defty.h:T_L1S_GLOBAL) ===
Global Layer1 Sync variables, such as * L1S Task Management * MFTAB management variables * Control Parameters (TOA) * TPU and DSP control registers * Frame Number Management for serving cell (actual_time, next_time, next_plus_time) * TX Power management * RXqual mesurement

=== l1a (Layer1/L1c/Inc/l1_defty.h:T_L1A_GLOBAL) ===
Global Layer1 Async variables, such as * State for L1A machines (1 for each L1A_PROCESS) * L1A Task management * MEasurement task management

=== l1a_l1s_com (T_L1A_L1S_COM) ===
Communication Structure from L1A into L1S * serving cell identity / information * parameters for idle mode * parameters for CBCH * random access information * ADC management * TXPWR management * dedicated channel parameters (T_DEDIC_PARAM) * neighbor cell information * BA list / FULL list * L1S task management * measurement tasks management * input level memory for AGC management

=== l1s_dsp_com (T_L1S_DSP_COM) ===
Communication structure for L1S -> DSP communication * active page for ARM writing to DSP * active page for ARM reading from DSP * pointers to dual-buffered (DB) and non-dual-buffered (NDB) MCU<->DSP pages

==== T_DB_MCU_TO_DSP === * {downlink,uplink} task {command, burst identifier} * d_task_d -- Downlink DSP task number * d_burst_d -- Downlink burst identifier * d_task_u -- Uplink DSP task number * d_burst_u -- Uplink burst identifier * d_task_md -- downlink monitoring (FB/SB) command * d_background -- background tasks * d_debug -- Debug/Acknowledge/general purpose word * d_task_ra -- RA task command * d_fn -- frane mumber in case of TCH {{{
// bit [0..7] -> b_fn_report, FN in the normalized reporting period.
// bit [8..15] -> b_fn_sid, FN % 104, used for SID positionning.
}}} * d_ctrl_tch -- TCH description {{{
// bit [0..3] -> b_chan_mode, channel mode.
// bit [4..5] -> b_chan_type, channel type.
// bit [6] -> reset SACCH.
// bit [7] -> vocoder ON
// bit [8] -> b_sync_tch_ul, synchro. TCH/UL.
// bit [9] -> b_sync_amr,
// bit [10] -> b_stop_tch_ul, stop TCH/UL.
// bit [11] -> b_stop_tch_dl, stop TCH/DL.
// bit [12.14] -> b_tch_loop, tch loops A/B/C.
// bit [15] -> b_subchannel
}}} * d_ctrl_abb -- Bit field indicating teh analog baseband register to send {{{
// bit [0] -> b_ramp: the ramp information(a_ramp[]) is located in NDB
// bit [1.2] -> unused
// bit [3] -> b_apcdel: delays-register in NDB
// bit [4] -> b_afc: freq control register in DB
// bit [5..15] -> unused
}}} * da_a5fn -- encryption frame number {{{
// word 0, bit [0..4] -> T2.
// word 0, bit [5..10] -> T3.
// word 1, bit [0..11] -> T1.
}}} * d_power_ctl -- power level control (L1D_AUXAPC|n) * d_afc -- AFC value (enabled by b_afc in d_ctrl_abb) * d_ctrl_system -- Control Register for RESET/RESUME {{{
// bit [0..2] -> b_tsq, training sequence.
// bit [3] -> b_bcch_freq_ind, BCCH frequency indication.
// bit [15] -> b_task_abort, DSP task abort command.
}}}

==== T_DB_DSP_TO_MCU ==== * {downlink,uplink} task {command, burst identifier} * d_task_d * d_burst_d * d_task_u * d_burst_u * d_task_md -- downlink monitoring (FB/SB) command * number of cells to monitor * d_background -- background tasks * d_task_ra -- RA task command * a_serv_Demod -- Serv. cell demod. result, array of 4 words (TOA,PM,ANGLE,SNR) * a_pm -- Power measurement results, array of 3 words * a_sch -- Header + SB information, array of 5 words

==== T_NDB_MCU_DSP ==== * d_dsp_page {{{
// bit⁰ -> B_GSM_PAGE: which of the two double-buffered pages is current
// bit¹ -> B_GSM_TASK: is the GSM TASK active?
// bit² -> B_MISC_PAGE: which of the two misc pages is current
// bit³ -> B_MISC_TASK: are MISC tasks active?
}}} * d_error_status -- DSP status returned (DSP->MCU) * d_spcx_rif -- RIF control (MCU->DSP), always set to 0x179 * d_tch_mode -- TCH mode register {{{
// bit [0..1] -> b_dai_mode.
// bit [2] -> b_dtx.
// bit³ -> play_ul when set to 1
// bit⁴ -> play_dl when set to 1
// bit⁵ -> DTX selection for voice memo
// bit⁶ -> Reserved for ciphering debug
// bit[7..10] -> Reserved for ramp up control
// bit¹¹ -> Reserved for analog device selection
}}} * d_debug1 -- bit 0 at 1 enable dsp f_tx delay of 400000 cyc DEBUG * d_dsp_test * API version number information * d_version_number1 -- code version number * d_version_number2 -- patch version number * debug buffer for tracing * p_debug_buffer * d_debug_buffer_size * d_debug_trace_type * d_dsp_state -- DSP report its stata: 0 run, 1 Idle1, 2 Idle2, 3 Idle3 * p_debug_amr -- AMR debugging * d_mcsi_select -- Related to the MCSI bus interface * New words APCDEL1 and APCDEL2 for 2TX: TX/PRACH combinations * d_apcdel1_bis * d_apcdel2_bis * New registres due to IOTA ABB * d_apcdel2 -- copied from l1config.params.apcdel2 * d_vbctrl2 * d_bulgcal -- Calibration value copied from l1_config.params.bulgcal * Analog Base Band * d_afcctladd -- Copied form l1_config.params.afcctladd * d_vbuctrl -- Voice Uplink Control? * d_vbdctrl -- Voice Downlink Control? * d_apcdel1 -- APC? * d_apcoff -- APC? * d_bulioff -- Copied from l1_config.params.bulioff * d_bulqoff -- Copied from l1_config.params.bulqoff * d_dai_onoff -- Copied from l1_config.params.dai_onoff * d_auxdac -- * d_bbctrl * results of monitoring tasks (FB + SB) DSP->MCU * d_fb_det -- FB detection result (1 for FOUND) * d_fb_mode -- Mode for FB detection algorithm * FB_MODE_0 -- wideband search for FB detection * FB_MODE_1 * a_async_demod⁴ -- FB/SB demod. result (TOA,PM,ANGLE,SNR) * audio gain for upolink and downlink * d_audio_gain_ul * d_audio_gain_dl * audio playback related data * d_audio_compressor_ctrl * d_audio_init * d_audio_status * Tones (MCU -> DSP) * d_toneskb_init * d_toneskb_status * d_k_x1_t0 * d_k_x1_t1 * d_k_x1_t2 * d_pe_rep * d_pe_off * d_se_off * d_bu_off * d_t0_on * d_t0_off * d_t1_on * d_t1_off * d_t2_on * d_t2_off * d_k_x1_kt0 * d_k_x1_kt1 * d_dur_kb * d_shiftdl * d_shiftul * d_aec_ctrl * d_es_level_api * d_mu_api * melody ringer module * d_melo_osc_used * d_melo_osc_active * a_melo_route0 ... a_melo_route7 * d_melody_selection -- selection of melody format * speech recognition related data * d_sr_status * d_sr_param -- parameters for the DSP speech recognition task: OOV threshold * d_sr_bit_exact_test * d_sr_nb_words -- number of words used in the speech recognition task * d_sr_db_level -- Estimate voice level in dB * d_sr_db_noise -- Estimate noise in dB * a_n_best_words -- Array of the 4 best words * a_n_best_score -- Array of the 4 best scores (32bit for each score) * audio buffer * a_dd_1²² * a_du_1²² * v42bis module * d_v42b_nego0 * d_v42b_nego1 * d_v42b_control * d_v42b_ratio_ind * d_mcu_control * d_mcu_control_sema * background tasks * d_background_enable * B_DSPBGD_RECO -- background recognition task code * C_BGD_RECOGN * B_DSPBGD_UPD -- start of alignment update in dsp background * C_BGD_ALIGN * d_background_abort * d_background_state * d_max_background * a_background_tasks¹⁶ * a_back_task_io¹⁶ * GPRS/GEA ciphering info * d_gea_mode_ovly * a_gea_kc_ovly⁴ * d_thr_usf_detect -- word used for the init of USF threshold * d_a5mode -- A5 encryption mode * d_sched_mode_grps_ovly * a_ramp¹⁶ -- power ramp information * actual data inside logical channels * a_cd¹⁵ -- CCCH/SACCH downlink information * a_fd¹⁵ -- FACCH downlink information * a_dd_0²² -- traffic downlink data frames * a_cu¹⁵ -- CCCH/SACCH uplink information * a_fu¹⁵ -- FACCH upilink information * a_du_0²² -- TCH upilink data frames * d_rach -- RACH information (MCU -> DSP) * a_kc⁴ -- Kc (MCU->DSP) * integrated data services module * speech recognition model * EOTD related data * AMR v1.0 buffers * a_amr_config⁴ * a_ratscch_ul⁶ * a_ratscch_dl⁶ * d_amr_snr_est -- estimation of the SNR of the AMR speech block * detection thresholds

==== T_PARAM_MCU_DSP ====

All parameters are initialized at dsp_power_on() time form a static array.

• d_transfer_rate
• GPRS related latencies * d_lat_mcu_bridge * d_lat_mcu_hom2sam * d_lat_mcu_bef_fast_access * d_lat_dsp_after_sam
• d_grps_install_address (dsp start address)
• d_misc_config
• d_cn_sw_workaround
• d_fb_margin_beg
• Frequency Correction Burst (FB) * d_fb_margin_beg * d_fb_margin_end * d_nsubb_idle * d_nsubb_dedic * d_fb_thr_det_iacq * d_fb_thr_det_track
• Demodulation * d_dc_off_thres * d_dummy_thres * d_dem_pond_gewl * d_dem_pond_red
• TCH/F V1 Full-Rate Speech * d_maccthresh1 * d_mldt * d_maccthresh * d_gu * d_go * d_attmax * d_sm * d_b
• V42bis related data
• TCH/H V1 Half-Rate * d_ldT_hr * d_maccthresh_hr * d_maccthresh1_hr * d_gu_hr * d_go_hr * d_sm_hr * d_attmax_hr
• TCH/F V2 EFR * c_mldt_efr * c_maccthresh_efr * c_maccthresh1_efr * c_gu_efr * c_go_efr * c_b_efr * c_sm_efr * c_attmax_efr
• CHED
• FACCH module * d_facch_thr
• IDS module
• FIR coefficients * a_fir31_uplink³¹; * a_fir32_downlink³¹;

=== l1s_tpu_com (T_L1S_TPU_COM) ===