Cellular Network Infrastructure » OsmoGSMTester

Assigning to dexter to provide here with the information he has available for the device.

The step attenuator is controlled via the GPIO interface of the APU directly. As far as I know there are 4 attenuators. The synchronous serial interface is wired in parallel while the latch enable lines are wired individually. The attenuation value is shifted into the internal shift-register of all attenuator at once. The latch enable line latches the value to the outputs of the shift register to the register that controls the attenuation.

There is a git repository with a driver and a utility
git.sysmocom.de/sysmo-att-ctrl

The attenuator is an ZX76-31R5-SP+ from Mini-Circuits.

As far as I remember the GPIO chip in the APU is an NCT5104, some Info about the driver can be found here: https://github.com/tasanakorn/linux-gpio-nct5104d/pull/3/files