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simtrace @ master

# Date Author Comment
22f87eb4 01/14/2021 02:33 PM laforge

smartcard-fpc: Don't put solder cream on smartcard contacts
b161f50e 12/29/2020 04:30 PM laforge

add full-size smartcard to FPC adapter design files
6dc33931 10/01/2019 01:27 PM Kévin Redon

add v1.5 release file

Change-Id: I1185e30cb241b08b87ea3131c6a582fc96fe8fa5
01fb365d 10/01/2019 01:24 PM Kévin Redon

add README wit hardwar eproject details

Change-Id: Ie5f2ac7d15d28e44abb60fdbc16f3e9f97544b03
3d2234cf 10/01/2019 01:23 PM Kévin Redon

update BOM with DNP parts

Change-Id: If650fa0a806e77d72c432a83388c0a7e414333cc
518fb3f4 10/01/2019 01:02 PM Kévin Redon

add parts related datasheets

Change-Id: Ic61f1311d688f5a515385ca992a60f7f0fc75e82
6202db50 10/01/2019 01:00 PM Kévin Redon

Merge branch 'v1.5'

Change-Id: I19221ac1e88ee4ba6b74705f898c145fe76724a2
8958907a 10/01/2019 12:58 PM Kévin Redon

add v1.4 release files

Change-Id: I788d3b970fe8ec277bd77e0fe61bd795d554e94c
2714c8d3 10/01/2019 12:57 PM Kévin Redon

Merge branch 'v1.4'

Change-Id: Ie406e2d62adbd2e9914b04b9d874d2bd520026a9
f9895d70 10/01/2019 12:47 PM Kévin Redon

add v1.3 release files

Change-Id: I32d82402a8c56ae2b27345bbff20c3214c1ed017
83d28736 10/01/2019 12:44 PM Kévin Redon

Merge branch 'v1.3'

Change-Id: I8ecde4dd1b6ff749e762bb2c42f99df04723c753
eb020e60 10/01/2019 12:37 PM Kévin Redon

add v1.2p release files

Change-Id: I21c9a9a0b96cdc68aea454b3c72091e02efdc01a
02405c01 10/01/2019 12:34 PM Kévin Redon

Merge branch 'v1.2_production'

Change-Id: Ib4cba75e8e3cb795b38db588f6ad452e1ff26faa
18ed2c1e 10/01/2019 12:30 PM Kévin Redon

add v1.1p release files

Change-Id: Ie0f05b912df1f1c44157be2cea24c12d75627374
dc4cb0a9 10/01/2019 12:28 PM Kévin Redon

Merge branch 'v1.1_production'

Change-Id: Ie064c379c9625b3cf6910912fd859e8e4dd0326e
74eb7fad 10/01/2019 12:25 PM Kévin Redon

add v1.0p release files

Change-Id: Id4b69f1b6deac0a7d0f3725f2d96d75c5b6c6ca8
8c202c01 10/01/2019 12:21 PM Kévin Redon

Merge branch 'v1.0_production'

Change-Id: I481a6b1802993ceb6d02e7edcbd3b6d853f1e487
ceeb2b1a 10/01/2019 12:17 PM Kévin Redon

add v1.0 release files

Change-Id: I879d35bca5bbaf2bc9616d181b085b4af7196fdc
28eff3dc 10/01/2019 11:09 AM Kévin Redon

schematic: add DNP note on JTAG and UART debug connectors

Change-Id: Id1c03418af021ce8febd666946bed3d8c01ceb77
06b45f17 09/03/2019 07:26 PM Kévin Redon

schematic: mark P1 and P2 as dot no place

P1 (JTAG) and P2 (FTDI UART) are onlz needed to be placed on
boards meant for development.
this can by done by hand separately.

Change-Id: I039ecff7d910f3de549bf2cec264a860c8ea1d34
bea9406b 09/03/2019 07:13 PM Kévin Redon

schematic: mark USB reset circuit as dot no place

the additional circuit to reset USB (by pulling D+ low) is not
required anymore since the USB controller in the SAM3S integrates
this capability.
the SAM3S-EK Development Board also demonstrates only the inline...
614ce7a7 09/03/2019 06:33 PM Kévin Redon

schematic: mark R19 as dot no place

R19 pulls VCC_PHONE low for better power on detection.
but the voltage divider R20 + R21 also pull this line low using
a stronger pull down resistor ok 20 kOhm.
thus R19 is unnecessary-

this change has been tested with a real simtrace device....
af693b2e 09/03/2019 03:52 PM Kévin Redon

schematic: rename NP to DNP for clarity

Change-Id: I06c38e353f2b804faa0dcbf4a9405d5d5042af3e
31f31e24 09/03/2019 03:47 PM Kévin Redon

schematic: mark JP1 and JP2 as dot no place

the protruding through hole pins of the header for the jumper
might get shorted when the board lies on a conductive surface,
leading to unwanted flash erase (JP2) or false TST signal (JP1)

Change-Id: I7fc6176d8c63ab8274b641e7bcd990093af3c4ca
2ad8ff81 09/03/2019 03:40 PM Kévin Redon

schematic: mark R22 as dot no place

R22 is use to pull the FLAGB output of the FPF2109 high since this
is an open-drain output.
but we actually don't read FLAGB do get the error conditions, thus
thus pull-up resistor is not required.

this change has been tested with a real simtrace device....
3df5a7f2 09/03/2019 03:20 PM Kévin Redon

schematic: mark R24 as no place

R24 is pulling the voltage regulator output for VCC_SIM down.
it has probably been added at the same time as R15.
since we don't read VCC_SIM it is not important to have it in a
defined state.
also the card, phone, or simtrace will provide power to the card...
9cb8f504 09/03/2019 03:08 PM Kévin Redon

schematic: mark R15 as no place

R15 is pulling VCC_SIM down.
it has probably been added because a load resistor is present in
the FPF2109 datasheet example application, or to not have VCC_SIM
in tri-state.
since we don't read VCC_SIM it is not important to have it in a...
7fc392aa 09/03/2019 12:48 PM Kévin Redon

schematic: make it more readable

- VCC is up
- GND is down
- group the parts by functionality and use net name
- separate decoupling capacitors
- arrange groups from left input to right output

Change-Id: I2d894dd10b8b619ccbce1ae8b7e25316963157c8
9bf63354 08/27/2019 03:31 PM Kévin Redon

updated libraries to KiCad 5

the library system changed from KiCad 4 to KiCad 5.
the custom libraries have been re-added to the project, and all
symbol names have been updated.
some symbols are a bit smaller, requiring to add some wires.

Change-Id: Id8e61aab6f05c633f455ef0d338c1658a62a2c4a
2bdf944c 08/27/2019 03:28 PM Kévin Redon

remove unused cable project

the layout for the FPC cable was not existing, and the schematic
is not an actual part of SIMtrace.
the FPC cables are designed separately.

Change-Id: I9138476c96404e18161b58b7b3a7a450ce633e81

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