Nokia EKSOS Node Control Unit » History » Version 17
laforge, 01/15/2023 05:10 PM
| 1 | 12 | laforge | h1. Nokia EKSOS Node Control Unit (NCU) 120 Ohms (T35010.11) |
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| 2 | 1 | laforge | |
| 3 | 17 | laforge | The Node Control Unit (NCU) contains a CPU environment for all of the common control functions inside the [[Nokia_EKSOS]] N20 node. The NCU contains the core functionalities such as the V5 control functions and node synchronisation. This unit also has a Q3 interface for network management and 4 x 2 Mbit/s interfaces for aggregate use. At least one NCU is always required in each Eksos N20 node. |
| 4 | 15 | laforge | |
| 5 | Each Eksos N20 node can support up to four V5.2 interfaces and there must be at least one NCU per each V5.2 interface. |
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| 6 | |||
| 7 | 16 | laforge | h2. Photos |
| 8 | |||
| 9 | {{thumbnail(eksos_ncu_top.jpg)}} |
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| 10 | {{thumbnail(eksos_ncu_bot.jpg)}} |
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| 11 | |||
| 12 | h2. Connectors |
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| 13 | 8 | laforge | |
| 14 | |_.Label|_.Designation (PCB)|_.Type|_.Description| |
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| 15 | 14 | laforge | |4x 2M|NR1|Euroconnector C/2 (Harting 09232486821?)|E1 links of V5 interface| |
| 16 | 12 | laforge | |SR|J5/J11|RJ45|Sync In| |
| 17 | |TR|J6/J12|RJ45|Sync Out| |
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| 18 | |Q1/AUX|J7|RJ45|?| |
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| 19 | |Q1/AUX|J7|RJ45|?| |
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| 20 | |ALRM|J7|RJ45|External Supervision| |
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| 21 | |Q3|J7|RJ45|Q3 (Eth/802.2LLC/ISO/OSI) 10Base-T| |
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| 22 | |Q3|J1|BNC|Q3 (Eth/802.2LLC/ISO/OSI) 10Base-2| |
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| 23 | |||
| 24 | h3. SR / SYNC IN |
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| 25 | |||
| 26 | |_.Signal|_.Pin|_.Description| |
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| 27 | |SYN R1A|4|Synchronisation receive| |
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| 28 | |SYN R1B|5|Synchronisation receive| |
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| 29 | |||
| 30 | h3. ST / SYNC OUT |
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| 31 | |||
| 32 | |_.Signal|_.Pin|_.Description| |
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| 33 | |SYN T1A|1|Synchronisation transmit| |
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| 34 | |SYN T1B|2|Synchronisation transmit| |
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| 35 | |||
| 36 | h3. Q1/AUX |
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| 37 | |||
| 38 | |_.Signal|_.Pin|_.Description| |
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| 39 | |Q1OCL+|1|Q1 output clock positive, idle state +5V| |
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| 40 | |Q1OCL-|2|Q1 output clock nevative, idle state +0V| |
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| 41 | |Q1OUT+|3|Q1 bus output positive V.11 signal, idle state +5V| |
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| 42 | |Q1IN+|4|Q1 bus input positive V.11 signal, idle state +5V| |
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| 43 | |Q1IN-|5|Q1 bus input negative V.11 signal, idle state 0V| |
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| 44 | |Q1OUT-|6|Q1 bus output negative V.11 signal, idle state 0V| |
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| 45 | |Q1ICL+|7|Q1 input clock positive, idle state +5V| |
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| 46 | |Q1ICL-|8|Q1 input clock negative, idle state +0V| |
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| 47 | |||
| 48 | h3. ALARM |
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| 49 | |||
| 50 | |_.Signal|_.Pin|_.Description| |
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| 51 | |PAI1|1|External Alarm Input 1| |
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| 52 | |PAI2|2|External Alarm Input 2| |
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| 53 | |PAI3|3|External Alarm Input 3| |
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| 54 | |PAIO1|4|External Alarm Input/Output 1| |
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| 55 | |PAIO2|5|External Alarm Input/Output 2| |
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| 56 | |IAV1|6|Analog Voltage Measurement Point 1| |
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| 57 | |IAV2|7|Analog Voltage Measurement Point 2| |
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| 58 | |GND|8|Ground| |
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| 59 | |||
| 60 | 8 | laforge | |
| 61 | 1 | laforge | h2. Main components |
| 62 | |||
| 63 | * 1x Motorola MC68MH360A125VL CPU/Controller |
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| 64 | 10 | laforge | ** clocked at 32.768 MHz? |
| 65 | ** User Manual: attachment:MC68360UM.pdf |
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| 66 | ** Tutorial: attachment:MC68360TUT.pdf |
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| 67 | ** QMC Supplement: attachment:MC68MH360UM.pdf |
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| 68 | 11 | laforge | ** Errata: attachment:MC68360UMAD.pdf |
| 69 | 10 | laforge | * 6x Sharp LH28F160S3HNS-S5 16Mbit Flash |
| 70 | ** Data sheet: attachment:LH28F160S3HNS.pdf |
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| 71 | * 4x Samsung K4F151612D-TC6 1Mx16bit CMOS DRAM |
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| 72 | ** Data sheet: attachment:K4F151612D.pdf |
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| 73 | 3 | laforge | |
| 74 | h3. E1 Interface for V5 |
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| 75 | |||
| 76 | 1 | laforge | * 1x Exar XRT5897IV |
| 77 | ** 7-channel E1 line interface |
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| 78 | ** Data Sheet: attachment:XRT5897.pdf |
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| 79 | 7 | laforge | ** 4 interfaces exposed on 4x2M header |
| 80 | ** 1 intrface exposed on SR / ST (separate RX and TX?) RJ45 |
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| 81 | 3 | laforge | |
| 82 | h3. Q3 Ethernet 10-Base-2 Interface |
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| 83 | |||
| 84 | 2 | laforge | * 1x MC68160AFB |
| 85 | ** Enhanced Ethernet Transceiver |
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| 86 | ** Data Sheet: attachment:MC68160A.pdf |
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| 87 | 3 | laforge | * 1x DP8392C |
| 88 | ** Coaxial Transceiver Interface |
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| 89 | 4 | laforge | ** Data Sheet: attachment:DP8392C.pdf |
| 90 | |||
| 91 | 6 | laforge | h3. Q1 Aux ALRM Q3 Interfaces |
| 92 | 4 | laforge | |
| 93 | * 2x DS36954 quad RS-485 transceiver |
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| 94 | ** Data Sheet: attachment:DS36954.pdf |
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| 95 | 5 | laforge | * 1x MAX3223 RS232 transceiver |
| 96 | ** Data Sheet: attachment:MAX3222-MAX3241.pdf |
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| 97 | 4 | laforge | |
| 98 | h3. Backplane interface |
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| 99 | |||
| 100 | * LSI Logic LSA9360 BABYLON |
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| 101 | * NEC uPD65842 CMOS GATE ARRAY |
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| 102 | ** Data Sheet: attachment:uPD6842.pdf |
