Cisco AS5400 » History » Revision 15
Revision 14 (laforge, 10/08/2023 11:23 AM) → Revision 15/18 (laforge, 10/08/2023 12:08 PM)
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h1. Cisco AS5400
This is a modular access server for voice, data (ISDN) and modem calls. It has a modular archticture and there are a variety of suitable modules.
The System consists of PSU, a Mainboard, a backplane and three trays. Each of the three Trays can house two modules. The mainboard also directly houses one module.
* attachment:Cisco_AS5350_AS5400_Software_Configuration_Guide.pdf
h2. Mainboard
* 2x Gigabit Ethernet: Broadcom BCM5481
* 1x coaxial BITS (timing): Dallas DS2
* 1x Marvell GT-96124-B-2 F55551.0
* Altera Cyclone EP1C4F400C8
* Xilinx Spartan XC2S300E
* PI7C8150 PCI bridge (module to backplane)
* PI7C8150 PCI bridge (CPU to backplane)
* PI7C8150 PCI bridge (unused PCI slot)
* 1x unknown under natural color heatsink
* 1x unknown under black anodized heatsink (700-09863-01 REV A0 / VETTE 0824)
* CompactFlash slot with 128MB CF card
* Memory slot holding STEC STM122116RT 512MB 2R8 PC2700E CL2.5-3-3 RAM
h2. Trays (73-9527-01)
The tray has one connection to the backplane, and two proprietary high-density connectors for the two modules.
The central TDM component on the Tray is the Zarlink *MT90866* _2432x2432 non-blocking digital switch with H.110 interface_ (data sheet see attachment:MT90866.pdf.
Each module's PCI bus is bridged to the backplane PCI using a Pericum *PI7C8150* _2-port PCI-to-PCI Bridge_ (data sheet see attachment:PI7C8150.pdf)
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h2. Modem modules
h3. NP108 module (800-0828-01)
This module is built around 18x Conexant/Mindspeed *RL56CSMV/6* chips (data sheet see attachment:RL56CSMV_6.pdf). Each of the chips features its own *MT48LC4M16A2* RAM chip. Internally, each of those chips contains an _ARM core_ for management, and six _Digital Data Pump_ dies.
Interfacing with the backplane is done via 3x Intel i960.
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h3. NP60 module (800-05643-01)
This module is the little brother of the NP108. It is built around 10x Conexant/Mindspeed *RL56CSMV/6* chips (data sheet see attachment:RL56CSMV_6.pdf). Each of the chips features its own *MT48LC4M16A2* RAM chip. Internally, each of those chips contains an _ARM core_ for management, and six _Digital Data Pump_ dies.
Interfacing with the backplane is done via 2x Intel i960.
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h3. PSU (Power Supply Unit)
As can be seen on the pictures, the PSU is a single unit that houses two redundant circuit board assmeblies, each with its own AC input.
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h2. Trunk interface modules
h3. 8PRI (800-06543-01)
This is an 8x PRI (E1/T1) interface.
Each PRI interface has its own EMI / overvoltage / transforer section, followed by a Mindspeed *Bt8370KPF* E1/Ta transceiver (datasheet see attachment:Bt8370KPF.pdf). The main CPU is an MPC860 PowerPC, interfaced via a PLX *PCI9054* PCI bridge (datasheet see attachment:PCI9054.pdf).
There are also two PMC FREEDM8 *PM7366* _Eight Channel Frame Engine and Datalink Manager_ (datasheet see attachment:PM7366.pdf).
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