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Bug #2302
closedosmo-bts-trx aborts due to illegal instruction
Added by neels almost 7 years ago. Updated over 6 years ago.
Status:
Closed
Priority:
Normal
Assignee:
-
Target version:
-
Start date:
05/29/2017
Due date:
% Done:
0%
Spec Reference:
Description
osmo-bts-trx used to work, but testing now gives reproducable aborts. Core dump is produced, traceback follows.
Updated by neels almost 7 years ago
Core was generated by `/home/neels/trial-182/inst/osmo-bts-trx/bin/osmo-bts-trx -r 1 -c /home/neels/tr'. Program terminated with signal SIGILL, Illegal instruction. #0 _mm_shuffle_epi8 (__Y=..., __X=...) at /usr/lib/gcc/x86_64-linux-gnu/4.9/include/tmmintrin.h:138 138 return (__m128i) __builtin_ia32_pshufb128 ((__v16qi)__X, (__v16qi)__Y); (gdb) bt #0 _mm_shuffle_epi8 (__Y=..., __X=...) at /usr/lib/gcc/x86_64-linux-gnu/4.9/include/tmmintrin.h:138 #1 _sse_metrics_k5_n2 (norm=1, paths=0x1e26510, sums=0x1d79290, out=<optimized out>, val=<synthetic pointer>) at viterbi_sse.c:328 #2 osmo_conv_gen_metrics_k5_n2_sse ( val=0x7fffc98bfb61 "xz\177\177s~\177~u~\177{t|\177~v|\177zx}\177\177w{\177{u\177\177\177w{\177\177yun\252\310", <incomplete sequence \360>, out=0x1deda50, sums=0x1d79290, paths=0x1e26510, norm=1) at viterbi_sse.c:571 #3 0x00007ff54f94f7a4 in forward_traverse (dec=dec@entry=0x1dbfab0, seq=seq@entry=0x7fffc98bfb61 "xz\177\177s~\177~u~\177{t|\177~v|\177zx}\177\177w{\177{u\177\177\177w{\177\177yun\252\310", <incomplete sequence \360>) at viterbi.c:606 #4 0x00007ff54f9501f8 in conv_decode (term=0, len=14, out=0x7fffc98bf940 "\217\371\213\311\377\177", punc=0x0, seq=0x7fffc98bfb61 "xz\177\177s~\177~u~\177{t|\177~v|\177zx}\177\177w{\177{u\177\177\177w{\177\177yun\252\310", <incomplete sequence \360>, dec=0x1dbfab0) at viterbi.c:632 #5 osmo_conv_decode_acc (code=<optimized out>, input=0x7fffc98bfb61 "xz\177\177s~\177~u~\177{t|\177~v|\177zx}\177\177w{\177{u\177\177\177w{\177\177yun\252\310", <incomplete sequence \360>, output=0x7fffc98bf940 "\217\371\213\311\377\177") at viterbi.c:688 #6 0x00007ff54f94cf75 in osmo_conv_decode (code=0x7ff54f9392c0 <gsm0503_rach>, input=0x7fffc98bfb61 "xz\177\177s~\177~u~\177{t|\177~v|\177zx}\177\177w{\177{u\177\177\177w{\177\177yun\252\310", <incomplete sequence \360>, output=output@entry=0x7fffc98bf940 "\217\371\213\311\377\177") at conv.c:616 #7 0x00007ff54f2e14b0 in gsm0503_rach_decode (ra=0x7fffc98bf98f "", burst=<optimized out>, bsic=<optimized out>) at gsm0503_coding.c:2626 #8 0x000000000040a03d in rx_rach_fn (l1t=0x1dfef38, tn=80 'P', fn=547561, chan=31614224, bid=1 '\001', bits=0x7fffc98bfb30 "\377\066\221\231\205t\207ki\211pp\204n\230\236p\212\211\206\201\201\201\221\225V\\\244\240Sc\247\226i\201\177\201s\213tud\223\212\213\220k\177\177xz\177\177s~\177~u~\177{t|\177~v|\177zx}\177\177w{\177{u\177\177\177w{\177\177yun\252\310", <incomplete sequence \360>, nbits=148, rssi=-42 '\326', toa=-1.44140625) at scheduler_trx.c:789 #9 0x0000000000427a4c in trx_sched_ul_burst (l1t=0x1dfef38, tn=122 'z', current_fn=547561, bits=0x7fffc98bfb30 "\377\066\221\231\205t\207ki\211pp\204n\230\236p\212\211\206\201\201\201\221\225V\\\244\240Sc\247\226i\201\177\201s\213tud\223\212\213\220k\177\177xz\177\177s~\177~u~\177{t|\177~v|\177zx}\177\177w{\177{u\177\177\177w{\177\177yun\252\310", <incomplete sequence \360>, nbits=1, rssi=120 'x', toa=-1.44140625) at scheduler.c:1687 #10 0x00000000004052ed in trx_data_read_cb (ofd=0x7fffc98bfb61, what=31382096) at trx_if.c:479 #11 0x00007ff54f944ad2 in osmo_fd_disp_fds (_eset=0x7fffc98c0050, _wset=0x7fffc98bffd0, _rset=0x7fffc98bff50) at select.c:178 #12 osmo_select_main (polling=polling@entry=0) at select.c:218 #13 0x00000000004217d4 in bts_main (argc=<optimized out>, argv=<optimized out>) at main.c:359 #14 0x00007ff54e0c1b45 in __libc_start_main (main=0x404990 <main>, argc=7, argv=0x7fffc98c0228, init=<optimized out>, fini=<optimized out>, rtld_fini=<optimized out>, stack_end=0x7fffc98c0218) at libc-start.c:287 #15 0x00000000004049be in _start () (gdb)
Updated by neels almost 7 years ago
- Status changed from New to In Progress
The 'SIGILL' is introduced by commit 34e228a9bcf3ac37287bb5e684ace46818740f3b.
core/conv: add x86 SSE support for Viterbi decoder Fast convolutional decoding is provided through x86 intrinsic based SSE operations. SSE3, found on virtually all modern x86 processors, is the minimal requirement. SSE4.1 and AVX2 are used if available. Also, the original code was extended with runtime SIMD detection, so only supported extensions will be used by target CPU. It makes the library more partable, what is very important for binary packages distribution. Runtime SIMD detection is currently implemented through the __builtin_cpu_supports call. Change-Id: I1da6d71ed0564f1d684f3a836e998d09de5f0351
Testing whether https://gerrit.osmocom.org/2760 fixes it...
Updated by neels almost 7 years ago
- Status changed from In Progress to Resolved
https://gerrit.osmocom.org/2760 does indeed fix it!
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