UmTRX » History » Revision 13
Revision 12 (Anonymous, 02/19/2016 10:52 PM) → Revision 13/14 (laforge, 02/21/2016 08:52 AM)
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h1. Welcome to the [[UmTRX]] project Developer Wiki
[[Image(UmTRX-scheme_simple-cropped-1024w.jpg,40%)]]
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[[UmTRX]] is a dual-channel wide-band SDR transceiver that is designed to be used with "OpenBTS":http://wush.net/trac/rangepublic and "OsmoBTS":http://openbsc.osmocom.org/trac/wiki/OsmoBTS GSM base stations. Given its SDR architecture [[UmTRX]] can easily be used with many other RF applications, and a combination of FPGA and FPRF (Field-Programmable RF) technology plus the ability to process data on a CPU or a DSP, makes it an extraordinarily flexible platform.
[[UmTRX]] is connected to a host via gigabit Ethernet. The Fairwaves version of UHD provides FPGA HDL and firmware, along with a host driver.
Laboratory packages and turnkey solutions are available from "Fairwaves":http://fairwaves.ru/.
h2. Intro, user info and blog
For a more detailed introduction, user information (e.g. hardware setup/booting/flashing, software setup) and the project blog, please see "h2. Development
* [[Architecture"httpumtrxorg]]
* Design documentation, UHD sources and datasheets etc.
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* Mailing list: "* [[MailingListRules|Mailing list rules"httplistsosmocomorgcgi-binmailmanlistinfoumtrx]]
* Issue tracker: "(to be migrated to this Trac instance!)
*** [[ReportingIssues|Guidance on reporting issues"httpscodegooglecompumtrxissueslist]]
* [[Building_firmware|Building firmware]]
* [[LMS6002DCalibration|LMS6002D calibration]]
* [[PowerConsumption|Power consumption]]
* [[PostProductionTesting|Post-production testing]]
* Roadmap
*** [[UmTRX_Roadmap|UmTRX]]
*** [[UHD-Fairwaves_Roadmap|UHD-Fairwaves]]
h2. Licensing
Altium Designer schematic and board layout files are made available under the Creative Commons Attribution-!ShareAlike 3.0 Unported license.
FPGA HDL, and firmware and host driver sources are made available under the GPL v3 license.
h2. Community
[[UmTRX]] is an Osmocom project and a partner project of "Myriad-RF":http://myriadrf.org/.
h2. Contributors
* Alexander Chemeris — project leader
* Andrey Sviyazov — hardware design
* Jean-Samuel Najnudel — hardware design and manufacturing
* Sergey Kostanbaev — FPGA HDL
* Andrey Sviyazov — initial host-side code
* Sylvain Munaut — various improvements
* Eric Wild — host-side code
* Sergey Kostanbaev — debugging
* Andrey Bakhmat — logo, diagrams and photos
* Andrew Karpenkov — FPGA development
* Andrew Back — community management
