• Table of contents
• Welcome to the UmTRX project Developer Wiki
  • Intro, user info and blog
  • Licensing
  • Community
  • Contributors

Welcome to the UmTRX project Developer Wiki¶

UmTRX is a dual-channel wide-band SDR transceiver that is designed to be used with OpenBTS and OsmoBTS GSM base stations. Given its SDR architecture UmTRX can easily be used with many other RF applications, and a combination of FPGA and FPRF (Field-Programmable RF) technology plus the ability to process data on a CPU or a DSP, makes it an extraordinarily flexible platform.

UmTRX is connected to a host via gigabit Ethernet. The Fairwaves version of UHD provides FPGA HDL and firmware, along with a host driver.

Laboratory packages and turnkey solutions are available from Fairwaves.

Intro, user info and blog¶

For a more detailed introduction, user information (e.g. hardware setup/booting/flashing, software setup) and the project blog, please see "h2. Development

• Architecture

• Design documentation, UHD sources and datasheets etc.
  • Altium Designer files, BOM, schematics and layout PDFs: git clone https://github.com/fairwaves/umtrx-schematics.git
  • Fairwaves version of UHD: git clone https://github.com/fairwaves/UHD-Fairwaves.git
  • LMS6002D transceiver IC documentation: git clone https://github.com/myriadrf/LMS6002D-docs.git
• Mailing list: http://lists.osmocom.org/cgi-bin/mailman/listinfo/umtrx
  • Mailing list rules
• Issue tracker: https://code.google.com/p/umtrx/issues/list (to be migrated to this Trac instance!)
• Building firmware
• LMS6002D calibration
• Power consumption
• Post-production testing
• Roadmap
  • UmTRX
  • UHD-Fairwaves

Licensing¶

Altium Designer schematic and board layout files are made available under the Creative Commons Attribution-!ShareAlike 3.0 Unported license.

FPGA HDL, and firmware and host driver sources are made available under the GPL v3 license.

Community¶

UmTRX is an Osmocom project and a partner project of Myriad-RF.

Contributors¶

• Alexander Chemeris — project leader
• Andrey Sviyazov — hardware design
• Jean-Samuel Najnudel — hardware design and manufacturing
• Sergey Kostanbaev — FPGA HDL
• Andrey Sviyazov — initial host-side code
• Sylvain Munaut — various improvements
• Eric Wild — host-side code
• Sergey Kostanbaev — debugging
• Andrey Bakhmat — logo, diagrams and photos
• Andrew Karpenkov — FPGA development
• Andrew Back — community management