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1
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/* Sample initialization file */
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2
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3
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.extern main
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4
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.extern exit
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5
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.extern AT91F_LowLevelInit
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6
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.extern pio_irq_isr_value
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7
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.extern tc_sniffer_next_buffer_for_fiq
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8
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9
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.text
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.code 32
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11
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12
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13
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.align 0
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14
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15
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.extern __stack_end__
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16
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.extern __bss_beg__
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.extern __bss_end__
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.extern __data_beg__
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.extern __data_end__
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.extern __data+beg_src__
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21
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.global start
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.global endless_loop
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24
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25
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/* Stack Sizes */
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26
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.set UND_STACK_SIZE, 0x00000004
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27
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.set ABT_STACK_SIZE, 0x00000004
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28
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.set FIQ_STACK_SIZE, 0x00000400
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29
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.set IRQ_STACK_SIZE, 0X00000400
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30
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.set SVC_STACK_SIZE, 0x00000400
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31
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32
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/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
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33
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.set MODE_USR, 0x10 /* User Mode */
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34
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.set MODE_FIQ, 0x11 /* FIQ Mode */
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35
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.set MODE_IRQ, 0x12 /* IRQ Mode */
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36
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.set MODE_SVC, 0x13 /* Supervisor Mode */
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37
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.set MODE_ABT, 0x17 /* Abort Mode */
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38
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.set MODE_UND, 0x1B /* Undefined Mode */
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39
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.set MODE_SYS, 0x1F /* System Mode */
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40
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.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
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42
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.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
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43
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.equ AT91C_BASE_AIC, (0xFFFFF000)
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45
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.equ AT91C_BASE_MC, (0xFFFFFF00)
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.equ AT91C_BASE_PIOA, 0xFFFFF400
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.equ AT91C_BASE_TC0, 0xFFFA0000
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48
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.equ AT91C_BASE_TC2, 0xFFFA0080
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.equ AT91C_BASE_SSC, 0xFFFD4000
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.equ SSC_CR, 0x0
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.equ SSC_RCMR, 0x10
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.equ SSC_CR_TXEN, 0x100
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.equ AT91C_TC_SWTRG, ((1 << 2)|1)
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.equ AT91C_TC_CLKEN, (1 << 0)
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.equ PIO_DATA, (1 << 18)
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.equ PIOA_SODR, 0x30
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.equ PIOA_CODR, 0x34
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.equ PIOA_PDSR, 0x3c
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.equ PIOA_IDR, 0x44
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.equ PIOA_ISR, 0x4c
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.equ TC_CCR, 0x00
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.equ TC2_CV, (0x80+0x10)
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63
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.equ AIC_EOICR, (304)
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.equ PIO_LED1, (1 << 25)
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.equ PIO_LED2, (1 << 12)
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.equ MC_RCR, 0xFFFFFF00
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.equ AIC_ISCR, (0x12C)
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.equ PIO_SECONDARY_IRQ, 31
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.equ PIO_SECONDARY_IRQ_BIT, (1 << PIO_SECONDARY_IRQ)
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70
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.equ BUFSIZE, 1024
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start:
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_start:
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_mainCRTStartup:
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76
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/* Setup a stack for each mode - note that this only sets up a usable stack
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for system/user, SWI and IRQ modes. Also each mode is setup with
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79
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interrupts initially disabled. */
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80
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ldr r0, .LC6
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81
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msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode */
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mov sp, r0
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sub r0, r0, #UND_STACK_SIZE
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msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */
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mov sp, r0
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86
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sub r0, r0, #ABT_STACK_SIZE
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msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */
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/* Preload registers for FIQ handler */
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ldr r10, =AT91C_BASE_PIOA
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ldr r12, =AT91C_BASE_TC0
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ldr r8, =AT91C_BASE_AIC
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/*ldr r9, =AT91C_BASE_SSC*/
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mov sp, r0
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sub r0, r0, #FIQ_STACK_SIZE
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msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
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mov sp, r0
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sub r0, r0, #IRQ_STACK_SIZE
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msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */
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mov sp, r0
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100
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sub r0, r0, #SVC_STACK_SIZE
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msr CPSR_c, #MODE_SYS|I_BIT|F_BIT /* System Mode */
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102
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mov sp, r0
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103
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/* We want to start in supervisor mode. Operation will switch to system
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mode when the first task starts. */
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msr CPSR_c, #MODE_SVC|I_BIT|F_BIT
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107
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bl AT91F_LowLevelInit
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109
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110
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/* Clear BSS. */
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111
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112
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mov a2, #0 /* Fill value */
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mov fp, a2 /* Null frame pointer */
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mov r7, a2 /* Null frame pointer for Thumb */
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115
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ldr r1, .LC1 /* Start of memory block */
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ldr r3, .LC2 /* End of memory block */
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subs r3, r3, r1 /* Length of block */
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beq .end_clear_loop
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mov r2, #0
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121
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.clear_loop:
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strb r2, [r1], #1
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subs r3, r3, #1
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bgt .clear_loop
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126
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.end_clear_loop:
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128
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129
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/* Initialise data. */
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130
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ldr r1, .LC3 /* Start of memory block */
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ldr r2, .LC4 /* End of memory block */
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ldr r3, .LC5
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subs r3, r3, r1 /* Length of block */
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135
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beq .end_set_loop
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136
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.set_loop:
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138
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ldrb r4, [r2], #1
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strb r4, [r1], #1
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subs r3, r3, #1
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141
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bgt .set_loop
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142
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143
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.end_set_loop:
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144
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145
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/* call main */
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146
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mov r0, #0 /* no arguments */
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147
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mov r1, #0 /* no argv either */
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148
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149
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ldr lr, =main
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150
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bx lr
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151
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endless_loop:
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153
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b endless_loop
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154
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155
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156
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.align 0
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157
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158
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.LC1:
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159
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.word __bss_beg__
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160
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.LC2:
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161
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.word __bss_end__
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.LC3:
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.word __data_beg__
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.LC4:
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.word __data_beg_src__
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.LC5:
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.word __data_end__
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168
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.LC6:
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169
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.word __stack_end__
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170
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171
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172
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/* Setup vector table. Note that undf, pabt, dabt, fiq just execute
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173
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a null loop. */
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174
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175
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.section .startup,"ax"
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176
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.code 32
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177
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.align 0
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178
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b _start /* reset - _start */
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180
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ldr pc, _undf /* undefined - _undf */
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ldr pc, _swi /* SWI - _swi */
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ldr pc, _pabt /* program abort - _pabt */
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183
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ldr pc, _dabt /* data abort - _dabt */
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184
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nop /* reserved */
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185
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ldr pc, [pc,#-0xF20] /* IRQ - read the AIC */
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186
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/* ldr pc, [pc,#-0xF20] /* FIQ - fall through to fiq_handler */
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187
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188
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189
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/* Following is modified from openpcd/firmware/src/start/Cstartup_app.S */
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190
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#define LED_TRIGGER
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191
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192
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.global fiq_handler
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.func fiq_handler
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my_fiq_handler:
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/* code that uses pre-initialized FIQ reg */
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/* r8 tmp
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r9 tmp
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r10 AT91C_BASE_PIOA
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r11 tmp
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200
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r12 AT91C_BASE_TC0
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201
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r13 stack
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202
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r14 lr
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*/
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204
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205
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#ifdef LED_TRIGGER
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mov r11, #PIO_LED1
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str r11, [r10, #PIOA_CODR] /* enable LED */
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#endif
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ldr r8, [r10, #PIOA_ISR]
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210
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211
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/* Store the retrieved PIO ISR value into pio_irq_isr_value */
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212
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ldr r11, =pio_irq_isr_value
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213
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str r8, [r11]
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214
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215
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tst r8, #PIO_DATA /* check for PIO_DATA change */
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216
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beq .no_buffer
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217
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218
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ldr r11, [r10, #PIOA_PDSR]
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219
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tst r11, #PIO_DATA /* check for PIO_DATA == 1 */
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220
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beq .no_buffer
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221
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222
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/* mov r11, #PIO_LED2
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str r11, [r10, #PIOA_CODR] /* enable LED */
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224
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225
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/* Load the TC2.CV into r9 */
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226
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ldr r9, [r12, #TC2_CV]
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227
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228
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ldr r11, =tc_sniffer_next_buffer_for_fiq
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229
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ldr r11, [r11]
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/* r11 now contains the value of tc_sniffer_next_buffer_for_fiq, e.q. the address
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* of the next buffer */
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232
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233
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/* Jump to .no_buffer if the pointer is 0, indicating that no buffer is set */
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cmp r11, #0
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beq .no_buffer
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236
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/* Increment the value at the location the pointer points to */
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238
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ldr r8, [r11]
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add r8, r8, #1
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str r8, [r11]
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241
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242
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/* At this point:
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r8 = count
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244
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r9 = TC2.CV
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r11 = pointer to buffer
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*/
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247
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cmp r8, #BUFSIZE
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bge .no_buffer
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250
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str r9, [r11, r8, LSL #2]
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252
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.no_buffer:
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/* mov r11, #PIO_LED2
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255
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str r11, [r10, #PIOA_SODR] /* disable LED */
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256
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257
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/* Trigger PIO_SECONDARY_IRQ */
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mov r11, #PIO_SECONDARY_IRQ_BIT
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259
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ldr r8, =AT91C_BASE_AIC
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str r11, [r8, #AIC_ISCR]
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261
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262
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#ifdef LED_TRIGGER
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263
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mov r11, #PIO_LED1
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str r11, [r10, #PIOA_SODR] /* disable LED */
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#endif
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266
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/*- Mark the End of Interrupt on the AIC */
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ldr r11, =AT91C_BASE_AIC
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str r11, [r11, #AIC_EOICR]
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270
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271
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/*- Restore the Program Counter using the LR_fiq directly in the PC */
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272
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subs pc, lr, #4
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273
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274
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.size my_fiq_handler, . - my_fiq_handler
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275
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.endfunc
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276
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277
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_undf: .word __undf /* undefined */
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_swi: .word swi_handler /* SWI */
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_pabt: .word __pabt /* program abort */
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_dabt: .word __dabt /* data abort */
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281
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_fiq: .word __fiq /* FIQ */
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282
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283
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__undf: b . /* undefined */
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284
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__pabt: b . /* program abort */
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285
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__dabt: b . /* data abort */
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286
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__fiq: b . /* FIQ */
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287
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288
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.end
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289
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