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/***************************************************************
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*
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* OpenPICC - ISO 14443 Layer 2 Type A PICC transceiver code
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* Manages receiving, sending and parts of framing
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*
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* This does not fully implement layer 2 in that it won't
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* automatically call the Miller decoder or Manchester encoder
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* for you. Instead you'll be given ssc rx buffer pointers and
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* are expected to hand in ssc tx buffer pointers. You've got
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* to call iso14443a_manchester and iso14443a_miller yourself.
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* The reason is that this makes it possible for the layer 3
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* implementation to work on raw samples without en/de-coding
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* time to enable fast responses during anticollision.
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*
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* Copyright 2008 Henryk Plötz <henryk@ploetzli.ch>
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*
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***************************************************************
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; version 2.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include <FreeRTOS.h>
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#include <board.h>
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#include <task.h>
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#include <errno.h>
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#include "openpicc.h"
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#include "iso14443_layer2a.h"
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#include "ssc.h"
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#include "ssc_buffer.h"
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#include "pll.h"
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#include "tc_fdt.h"
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#include "tc_cdiv.h"
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#include "tc_cdiv_sync.h"
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#include "tc_recv.h"
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#include "load_modulation.h"
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#include "clock_switch.h"
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#include "pio_irq.h"
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#include "usb_print.h"
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#include "cmd.h"
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#define PRINT_DEBUG 0
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static u_int8_t fast_receive;
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static u_int8_t tx_pending=0;
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static u_int8_t rx_pending=0;
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static iso14443_receive_callback_t callback=NULL;
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static ssc_handle_t *ssc;
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static tc_recv_handle_t th;
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#ifdef FOUR_TIMES_OVERSAMPLING
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#define RX_DIVIDER 32
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#else
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#define RX_DIVIDER 64
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#endif
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int iso14443_receive(iso14443_receive_callback_t _callback, iso14443_frame **frame, unsigned int timeout)
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{
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iso14443_frame* _frame = NULL;
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if(rx_pending) {
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return -EALREADY;
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}
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rx_pending=1;
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callback=_callback;
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if(tc_recv_receive(th, &_frame, timeout) == 0) {
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if(_frame == NULL) {
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/* Can this happen? */
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rx_pending=0;
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callback=NULL;
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return -ETIMEDOUT;
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}
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portENTER_CRITICAL();
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_frame->state = FRAME_PROCESSING;
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portEXIT_CRITICAL();
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if(callback != NULL && !fast_receive) {
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callback(NULL, _frame, 0);
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}
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if(frame != NULL) *frame = _frame;
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else {
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portENTER_CRITICAL();
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_frame->state = FRAME_FREE;
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portEXIT_CRITICAL();
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}
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rx_pending=0;
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callback=NULL;
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return 0;
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}
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/* Note: There is the remote chance of a race condition probability here if
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* a frame start was received right before the timeout for this function
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* expired. In the future one might want to replace this with some safer code
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* (hmm, maybe check TC2_CV?) but for now it's an essential safeguard to prevent
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* a hung receiver when no proper frame end is signalled to iso14443_ssc_callback
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* and therefore the callback never resets the flipflop */
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if(!tx_pending) {
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if(AT91F_PIO_IsInputSet(AT91C_BASE_PIOA, OPENPICC_PIO_FRAME)) tc_cdiv_sync_reset();
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}
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rx_pending=0;
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callback=NULL;
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return -ETIMEDOUT;
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}
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int iso14443_transmit(ssc_dma_tx_buffer_t *buffer, unsigned int fdt, u_int8_t async, unsigned int timeout)
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{
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if(tx_pending)
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return -EBUSY;
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tx_pending = 1;
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/* Immediately set up FDT and clock */
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//clock_switch(CLOCK_SELECT_CARRIER);
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ssc_set_gate(0);
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tc_fdt_set(fdt);
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// We'll keep the divider at 8
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//tc_cdiv_set_divider(8); // FIXME Magic hardcoded number
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if(!async) {
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/* FIXME Implement */
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(void)timeout;
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tx_pending = 0;
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return -EINVAL;
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}
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int ret = ssc_send(ssc, buffer);
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if(ret < 0) {
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tx_pending = 0;
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return ret;
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}
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if(!async) {
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/* FIXME Wait for completion, timeout or abort */
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}
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return 0;
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}
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int iso14443_tx_abort(void)
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{
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int ret = 0;
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taskENTER_CRITICAL();
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ret = ssc_send_abort(ssc);
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tx_pending = 0;
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taskEXIT_CRITICAL();
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return ret;
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}
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int iso14443_wait_for_carrier(unsigned int timeout)
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{
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(void)timeout;
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return 0;
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}
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u_int8_t iso14443_set_fast_receive(u_int8_t enable_fast_receive)
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{
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u_int8_t old_value = fast_receive;
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fast_receive = enable_fast_receive;
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return old_value;
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}
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u_int8_t iso14443_get_fast_receive(void)
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{
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return fast_receive;
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}
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static void iso14443_ssc_callback(ssc_callback_reason reason, void *data)
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{
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if( reason == SSC_CALLBACK_SETUP ) {
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// We'll keep the divider at 8
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tc_cdiv_set_divider(8); // FIXME Magic hardcoded number
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}
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if(reason == SSC_CALLBACK_RX_FRAME_BEGIN) {
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/* Busy loop for the frame end */
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int *end_asserted = data, i=0;
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for(i=0; i<96000; i++)
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if(*AT91C_TC2_CV > 2*128) { // FIXME magic number
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*end_asserted = 1;
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if(PRINT_DEBUG) usb_print_string_f("^", 0); // DEBUG OUTPUT
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break;
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}
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return;
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}
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if(reason == SSC_CALLBACK_TX_FRAME_ENDED) {
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tx_pending = 0;
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}
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if( reason == SSC_CALLBACK_RX_FRAME_ENDED && fast_receive ) {
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//clock_switch(CLOCK_SELECT_CARRIER); /* A Tx might be coming up */
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ssc_dma_rx_buffer_t *buffer = data;
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if(callback != NULL)
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callback(buffer, NULL, 1);
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}
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if( (reason == SSC_CALLBACK_RX_FRAME_ENDED && !tx_pending) || reason == SSC_CALLBACK_RX_STARTING
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|| reason == SSC_CALLBACK_TX_FRAME_ENDED ) {
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/* For regular SSC Rx we'd set the clock to
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// clock_switch(CLOCK_SELECT_PLL);
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* however, the SSC Rx code is going to go away (at least for 14443-A)
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* and switching clocks messes up the Tx timing, so we do a */
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//clock_switch(CLOCK_SELECT_CARRIER);
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ssc_set_gate(1);
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tc_fdt_set(0xff00);
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// We'll keep the divider at 8
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//tc_cdiv_set_divider(RX_DIVIDER);
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tc_cdiv_sync_reset();
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#if 0
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int old=usb_print_set_default_flush(0);
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DumpStringToUSB("["); DumpUIntToUSB(reason); DumpStringToUSB("]");
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usb_print_set_default_flush(old);
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#endif
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}
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}
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static void iso14443_tc_recv_callback(tc_recv_callback_reason reason, void *data)
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{
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if( reason == TC_RECV_CALLBACK_RX_FRAME_ENDED && fast_receive ) {
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//clock_switch(CLOCK_SELECT_CARRIER); /* A Tx might be coming up */
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iso14443_frame *frame = data;
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if(callback != NULL)
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callback(NULL, frame, 1);
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}
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if( (reason == TC_RECV_CALLBACK_RX_FRAME_ENDED && !tx_pending) ||
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reason == TC_RECV_CALLBACK_SETUP ) {
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/* For T/C Rx we set the clock to */
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//clock_switch(CLOCK_SELECT_CARRIER);
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ssc_set_gate(1);
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tc_fdt_set(0xff00);
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// We'll keep the divider at 8
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//tc_cdiv_set_divider(RX_DIVIDER);
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tc_cdiv_sync_reset();
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}
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}
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int iso14443_layer2a_init(u_int8_t enable_fast_receive)
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{
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pll_init();
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tc_cdiv_init();
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tc_fdt_init();
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tc_cdiv_sync_init();
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tc_cdiv_sync_enable();
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clock_switch_init();
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load_mod_init();
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iso14443_set_fast_receive(enable_fast_receive);
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pio_irq_init_once();
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ssc = ssc_open(0, 1, SSC_MODE_14443A, iso14443_ssc_callback);
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if(ssc == NULL)
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return -EIO;
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int pauses_count;
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if(OPENPICC->features.clock_switching) {
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clock_switch(CLOCK_SELECT_CARRIER);
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pauses_count = 0;
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} else {
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if(OPENPICC->default_clock == CLOCK_SELECT_CARRIER) {
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pauses_count = 0;
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} else {
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return -ENOTSUP;
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}
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}
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if(tc_recv_init(&th, pauses_count, iso14443_tc_recv_callback) < 0) {
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ssc_close(ssc);
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return -EIO;
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}
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load_mod_level(3);
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return 0;
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}
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