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/* AT91SAM7 ADC controller routines for OpenPICC
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* (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <errno.h>
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#include <string.h>
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#include <sys/types.h>
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#include <AT91SAM7.h>
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#include <lib_AT91SAM7.h>
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#include <openpcd.h>
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#include <os/usb_handler.h>
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#include "../openpcd.h"
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#include <os/dbgu.h>
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#define OPENPICC_ADC_CH_FIELDSTR AT91C_ADC_CH4
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#define OPENPICC_ADC_CH_PLL_DEM AT91C_ADC_CH5
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#define DEBUG_ADC
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#ifdef DEBUG_ADC
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#define DEBUGADC DEBUGP
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#else
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#define DEBUGADC do { } while (0)
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#endif
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static const AT91PS_ADC adc = AT91C_BASE_ADC;
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enum adc_states {
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ADC_NONE,
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ADC_READ_CONTINUOUS,
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ADC_READ_CONTINUOUS_USB,
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ADC_READ_SINGLE,
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};
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struct adc_state {
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enum adc_states state;
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struct req_ctx *rctx;
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};
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static struct adc_state adc_state;
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static void adc_irq(void)
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{
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uint32_t sr = adc->ADC_SR;
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struct req_ctx *rctx = adc_state.rctx;
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DEBUGADC("adc_irq(SR=0x%08x, IMR=0x%08x, state=%u): ",
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sr, adc->ADC_IMR, adc_state.state);
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switch (adc_state.state) {
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case ADC_NONE:
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//break;
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case ADC_READ_CONTINUOUS_USB:
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if (sr & AT91C_ADC_EOC4)
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DEBUGADC("CDR4=0x%4x ", adc->ADC_CDR4);
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if (sr & AT91C_ADC_EOC5)
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DEBUGADC("CDR5=0x%4x ", adc->ADC_CDR5);
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if (sr & AT91C_ADC_ENDRX) {
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/* rctx full, get rid of it */
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DEBUGADC("sending rctx (val=%s) ",
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hexdump(rctx->data[4], 2));
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req_ctx_set_state(rctx, RCTX_STATE_UDP_EP2_PENDING);
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adc_state.state = ADC_NONE;
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adc_state.rctx = NULL;
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//AT91F_PDC_SetRx(AT91C_BASE_PDC_ADC, NULL, 0);
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/* Disable EOC interrupts since we don't want to
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* re-start conversion any further*/
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AT91F_ADC_DisableIt(AT91C_BASE_ADC, AT91C_ADC_ENDRX);
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//AT91C_ADC_EOC4|AT91C_ADC_EOC5|AT91C_ADC_ENDRX);
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AT91F_PDC_DisableRx(AT91C_BASE_PDC_ADC);
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DEBUGADC("disabled IT/RX ");
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} else {
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if (sr & (AT91C_ADC_EOC4|AT91C_ADC_EOC5)) {
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/* re-start conversion, since we need more values */
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AT91F_ADC_StartConversion(adc);
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}
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}
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break;
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}
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AT91F_AIC_ClearIt(AT91C_BASE_AIC, AT91C_ID_ADC);
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DEBUGADC("cleeared ADC IRQ in AIC\r\n");
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}
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#if 0
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uint16_t adc_read_fieldstr(void)
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{
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return adc->ADC_CDR4;
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}
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uint16_T adc_read_pll_dem(void)
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{
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return adc
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}
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#endif
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static int adc_usb_in(struct req_ctx *rctx)
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{
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struct openpcd_hdr *poh = (struct openpcd_hdr *) &rctx->data[0];
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switch (poh->cmd) {
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case OPENPCD_CMD_ADC_READ:
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DEBUGADC("ADC_READ(chan=%u, len=%u) ", poh->reg, poh->val);
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//channel = poh->reg;
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if (adc_state.rctx) {
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/* FIXME: do something */
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req_ctx_put(rctx);
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}
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adc_state.state = ADC_READ_CONTINUOUS_USB;
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adc_state.rctx = rctx;
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rctx->tot_len = sizeof(*poh) + poh->val * 2;
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AT91F_PDC_SetRx(AT91C_BASE_PDC_ADC, rctx->data, poh->val);
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AT91F_PDC_EnableRx(AT91C_BASE_PDC_ADC);
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AT91F_ADC_EnableChannel(AT91C_BASE_ADC, OPENPICC_ADC_CH_FIELDSTR);
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AT91F_ADC_EnableIt(AT91C_BASE_ADC, AT91C_ADC_ENDRX |
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OPENPICC_ADC_CH_FIELDSTR);
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AT91F_ADC_StartConversion(adc);
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break;
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}
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}
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int adc_init(void)
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{
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AT91F_ADC_CfgPMC();
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AT91F_ADC_CfgTimings(AT91C_BASE_ADC, 48 /*MHz*/, 5 /*MHz*/,
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20/*uSec*/, 700/*nSec*/);
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#if 0
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AT91F_ADC_EnableChannel(AT91C_BASE_ADC, OPENPICC_ADC_CH_FIELDSTR |
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OPENPICC_ADC_CH_PLL_DEM);
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#endif
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AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_ADC,
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AT91C_AIC_PRIOR_LOWEST,
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AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &adc_irq);
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AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_ADC);
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usb_hdlr_register(&adc_usb_in, OPENPCD_CMD_CLS_ADC);
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}
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