1 |
1dfa375a
|
henryk
|
/* OpenPICC TC (Timer / Clock) support code
|
2 |
|
|
* (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
|
3 |
|
|
*
|
4 |
|
|
* This program is free software; you can redistribute it and/or modify
|
5 |
|
|
* it under the terms of the GNU General Public License as published by
|
6 |
|
|
* the Free Software Foundation; either version 2 of the License, or
|
7 |
|
|
* (at your option) any later version.
|
8 |
|
|
*
|
9 |
|
|
* This program is distributed in the hope that it will be useful,
|
10 |
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
11 |
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
12 |
|
|
* GNU General Public License for more details.
|
13 |
|
|
*
|
14 |
|
|
* You should have received a copy of the GNU General Public License
|
15 |
|
|
* along with this program; if not, write to the Free Software
|
16 |
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
17 |
|
|
*
|
18 |
|
|
*/
|
19 |
|
|
|
20 |
|
|
|
21 |
|
|
/* PICC Simulator Side:
|
22 |
|
|
* In order to support responding to synchronous frames (REQA/WUPA/ANTICOL),
|
23 |
|
|
* we need a second Timer/Counter (TC2). This unit is reset by an external
|
24 |
|
|
* event (rising edge of modulation pause PCD->PICC, falling edge of
|
25 |
|
|
* demodulated data) connected to TIOB2, and counts up to a configurable
|
26 |
|
|
* number of carrier clock cycles (RA). Once the RA value is reached, TIOA2
|
27 |
|
|
* will see a rising edge. This rising edge will be interconnected to TF (Tx
|
28 |
|
|
* Frame) of the SSC to start transmitting our synchronous response.
|
29 |
|
|
*
|
30 |
|
|
*/
|
31 |
|
|
|
32 |
3fb02f71
|
henryk
|
#include <FreeRTOS.h>
|
33 |
|
|
#include <task.h>
|
34 |
1dfa375a
|
henryk
|
#include <lib_AT91SAM7.h>
|
35 |
|
|
#include <AT91SAM7.h>
|
36 |
|
|
#include "dbgu.h"
|
37 |
|
|
|
38 |
|
|
#include "openpicc.h"
|
39 |
3fb02f71
|
henryk
|
#include "led.h"
|
40 |
1dfa375a
|
henryk
|
#include "tc_cdiv.h"
|
41 |
|
|
#include "tc_fdt.h"
|
42 |
6549d886
|
henryk
|
#include "usb_print.h"
|
43 |
ad5b96d5
|
henryk
|
#include "ssc.h"
|
44 |
bdc39aad
|
henryk
|
#include "cmd.h"
|
45 |
1dfa375a
|
henryk
|
|
46 |
|
|
static AT91PS_TC tcfdt = AT91C_BASE_TC2;
|
47 |
|
|
|
48 |
|
|
void tc_fdt_set(u_int16_t count)
|
49 |
|
|
{
|
50 |
|
|
tcfdt->TC_RA = count;
|
51 |
|
|
}
|
52 |
|
|
|
53 |
202b56a4
|
henryk
|
int tc_fdt_get_next_slot(int reference_time, int slotlen)
|
54 |
bdc39aad
|
henryk
|
{
|
55 |
202b56a4
|
henryk
|
/*if(tcfdt->TC_SR & AT91C_TC_CLKSTA)
|
56 |
bdc39aad
|
henryk
|
while(tcfdt->TC_CV != 0xFFFF && (tcfdt->TC_CV - reference_time) % 128 != 0);
|
57 |
202b56a4
|
henryk
|
tcfdt->TC_CCR = AT91C_TC_SWTRG;*/
|
58 |
|
|
return tcfdt->TC_CV + (slotlen-((tcfdt->TC_CV - reference_time) % slotlen)) + 3*slotlen;
|
59 |
bdc39aad
|
henryk
|
}
|
60 |
|
|
|
61 |
1dfa375a
|
henryk
|
|
62 |
ad5b96d5
|
henryk
|
static const struct { char* name; u_int32_t flag;} flags[] = {
|
63 |
|
|
{ "MTIOB", AT91C_TC_MTIOB },
|
64 |
|
|
{ "MTIOA", AT91C_TC_MTIOA },
|
65 |
|
|
{ "CLKSTA", AT91C_TC_CLKSTA },
|
66 |
|
|
{ "ETRGS", AT91C_TC_ETRGS },
|
67 |
|
|
{ "LDRBS", AT91C_TC_LDRBS },
|
68 |
|
|
{ "LDRAS", AT91C_TC_LDRAS },
|
69 |
|
|
{ "CPCS", AT91C_TC_CPCS },
|
70 |
|
|
{ "CPBS", AT91C_TC_CPBS },
|
71 |
|
|
{ "CPAS", AT91C_TC_CPAS },
|
72 |
|
|
{ "LOVRS", AT91C_TC_LOVRS },
|
73 |
|
|
{ "COVFS", AT91C_TC_COVFS },
|
74 |
|
|
};
|
75 |
1dfa375a
|
henryk
|
|
76 |
1cdcc383
|
henryk
|
static void __ramfunc tc_fdt_irq(void) __attribute__ ((naked));
|
77 |
|
|
static void __ramfunc tc_fdt_irq(void)
|
78 |
1dfa375a
|
henryk
|
{
|
79 |
5cc0ed49
|
henryk
|
portSAVE_CONTEXT();
|
80 |
|
|
//vLedSetGreen(1);
|
81 |
1dfa375a
|
henryk
|
u_int32_t sr = tcfdt->TC_SR;
|
82 |
|
|
DEBUGP("tc_fdt_irq: TC2_SR=0x%08x TC2_CV=0x%08x ",
|
83 |
|
|
sr, tcfdt->TC_CV);
|
84 |
ad5b96d5
|
henryk
|
|
85 |
1dfa375a
|
henryk
|
if (sr & AT91C_TC_ETRGS) {
|
86 |
|
|
DEBUGP("Ext_trigger ");
|
87 |
|
|
}
|
88 |
|
|
if (sr & AT91C_TC_CPAS) {
|
89 |
|
|
DEBUGP("FDT_expired ");
|
90 |
|
|
}
|
91 |
|
|
if (sr & AT91C_TC_CPCS) {
|
92 |
|
|
DEBUGP("Compare_C ");
|
93 |
|
|
}
|
94 |
|
|
DEBUGPCR("");
|
95 |
ad5b96d5
|
henryk
|
AT91F_AIC_ClearIt(AT91C_ID_TC2);
|
96 |
3fb02f71
|
henryk
|
AT91F_AIC_AcknowledgeIt();
|
97 |
5cc0ed49
|
henryk
|
//vLedSetGreen(0);
|
98 |
3fb02f71
|
henryk
|
portRESTORE_CONTEXT();
|
99 |
1dfa375a
|
henryk
|
}
|
100 |
|
|
|
101 |
|
|
void tc_fdt_print(void)
|
102 |
|
|
{
|
103 |
|
|
DEBUGP("TC2_CV=0x%08x ", tcfdt->TC_CV);
|
104 |
|
|
DEBUGP("TC2_CMR=0x%08x ", tcfdt->TC_CMR);
|
105 |
|
|
DEBUGP("TC2_SR=0x%08x ", tcfdt->TC_SR);
|
106 |
|
|
DEBUGP("TC2_RA=0x%04x, TC2_RB=0x%04x, TC2_RC=0x%04x",
|
107 |
|
|
tcfdt->TC_RA, tcfdt->TC_RB, tcfdt->TC_RC);
|
108 |
|
|
}
|
109 |
|
|
|
110 |
|
|
void tc_fdt_init(void)
|
111 |
|
|
{
|
112 |
|
|
AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, AT91C_PA15_TF,
|
113 |
|
|
AT91C_PA26_TIOA2 | AT91C_PA27_TIOB2);
|
114 |
|
|
AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC,
|
115 |
|
|
((unsigned int) 1 << AT91C_ID_TC2));
|
116 |
|
|
/* Enable Clock for TC2 */
|
117 |
|
|
tcfdt->TC_CCR = AT91C_TC_CLKEN;
|
118 |
|
|
|
119 |
|
|
/* Clock XC1, Wave Mode, No automatic reset on RC comp
|
120 |
|
|
* TIOA2 in RA comp = set, TIOA2 on RC comp = clear,
|
121 |
bdc39aad
|
henryk
|
* TIOA2 on EEVT = clear, TIOA2 on SWTRG = clear,
|
122 |
1dfa375a
|
henryk
|
* TIOB2 as input, EEVT = TIOB2, Reset/Trigger on EEVT */
|
123 |
|
|
tcfdt->TC_CMR = AT91C_TC_CLKS_XC1 | AT91C_TC_WAVE |
|
124 |
|
|
AT91C_TC_WAVESEL_UP |
|
125 |
|
|
AT91C_TC_ACPA_SET | AT91C_TC_ACPC_CLEAR |
|
126 |
bdc39aad
|
henryk
|
AT91C_TC_AEEVT_CLEAR | AT91C_TC_ASWTRG_CLEAR |
|
127 |
1dfa375a
|
henryk
|
AT91C_TC_BEEVT_NONE | AT91C_TC_BCPB_NONE |
|
128 |
|
|
AT91C_TC_EEVT_TIOB | AT91C_TC_ETRGEDG_FALLING |
|
129 |
|
|
AT91C_TC_ENETRG | AT91C_TC_CPCSTOP ;
|
130 |
|
|
|
131 |
ad5b96d5
|
henryk
|
tcfdt->TC_RC = 0xffff;
|
132 |
|
|
|
133 |
1dfa375a
|
henryk
|
/* Reset to start timers */
|
134 |
|
|
tcb->TCB_BCR = 1;
|
135 |
|
|
|
136 |
|
|
AT91F_AIC_ConfigureIt(AT91C_ID_TC2,
|
137 |
|
|
OPENPCD_IRQ_PRIO_TC_FDT,
|
138 |
1cdcc383
|
henryk
|
AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, (THandler)&tc_fdt_irq);
|
139 |
a2f88381
|
henryk
|
tcfdt->TC_IER = AT91C_TC_CPCS | AT91C_TC_ETRGS;
|
140 |
ad5b96d5
|
henryk
|
AT91F_AIC_ClearIt(AT91C_ID_TC2);
|
141 |
1dfa375a
|
henryk
|
AT91F_AIC_EnableIt(AT91C_ID_TC2);
|
142 |
|
|
|
143 |
|
|
}
|