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32985a29
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laforge
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/* AT91SAM7 low-level startup outines for OpenPCD / OpenPICC DFU loader
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* (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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20 |
3b8d8831
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(no author)
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/*------------------------------------------------------------------------------
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//*- ATMEL Microcontroller Software Support - ROUSSET -
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//*------------------------------------------------------------------------------
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//* The software is delivered "AS IS" without warranty or condition of any
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//* kind, either express, implied or statutory. This includes without
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//* limitation any warranty or condition with respect to merchantability or
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//* fitness for any particular purpose, or against the infringements of
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//* intellectual property rights of others.
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//*-----------------------------------------------------------------------------
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//*- File source : Cstartup.s
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//*- Object : Generic CStartup for KEIL and GCC No Use REMAP
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//*- Compilation flag : None
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//*-
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//*- 1.0 18/Oct/04 JPP : Creation
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//*- 1.1 21/Feb/05 JPP : Set Interrupt
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//*- 1.1 01/Apr/05 JPP : save SPSR
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36 |
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//*-----------------------------------------------------------------------------*/
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37 |
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38 |
460ece83
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laforge
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/* Enable DFU by press of hardware POI_BOOTLDR switch */
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39 |
ad18651c
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(no author)
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#define CONFIG_DFU_SWITCH
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41 |
460ece83
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laforge
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/* Enable DFU by magic value in RAM and software reset */
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42 |
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#define CONFIG_DFU_MAGIC
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43 |
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44 |
520784c7
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(no author)
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//#define DEBUG_LL
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45 |
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46 |
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#define PIOA_PER 0xFFFFF400
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47 |
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#define PIOA_OER 0xFFFFF410
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48 |
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#define PIOA_SODR 0xFFFFF430
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49 |
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#define PIOA_CODR 0xFFFFF434
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50 |
83c18361
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(no author)
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#define LED1 25 /* this only works on OpenPICC, not Olimex */
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51 |
0a3534e7
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laforge
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52 |
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#ifdef DEBUG_LL
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/* Debugging macros for switching on/off LED1 (green) */
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54 |
520784c7
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(no author)
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.macro led1on
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ldr r2, =PIOA_CODR
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mov r1, #(1 << LED1)
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str r1, [r2]
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.endm
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.macro led1off
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ldr r2, =PIOA_SODR
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mov r1, #(1 << LED1)
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str r1, [r2]
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.endm
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.macro ledinit
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ldr r2, =PIOA_PER
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mov r1, #(1 << LED1)
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str r1, [r2]
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ldr r2, =PIOA_OER
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str r1, [r2]
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led1off
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.endm
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#else
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.macro ledinit
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.endm
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.macro led1on
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.endm
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.macro led1off
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.endm
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#endif
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81 |
9d0d7022
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(no author)
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.equ IRQ_Stack_Size, 0x00000400
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82 |
0a3534e7
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laforge
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.equ FIQ_Stack_Size, 0x00000400
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83 |
3b8d8831
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(no author)
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84 |
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.equ AIC_IVR, (256)
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.equ AIC_FVR, (260)
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.equ AIC_EOICR, (304)
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87 |
00882453
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(no author)
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.equ AIC_MCR_RCR, (0xf00)
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88 |
3b8d8831
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(no author)
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.equ AT91C_BASE_AIC, (0xFFFFF000)
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89 |
ad18651c
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(no author)
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.equ AT91C_PMC_PCER, (0xFFFFFC10)
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.equ AT91C_BASE_PIOA, (0xFFFFF400)
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.equ AT91C_ID_PIOA, (2)
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.equ PIOA_PDSR, (0x3c)
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cf4d20a6
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laforge
|
#if defined(PCD)
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ad18651c
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(no author)
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.equ PIO_BOOTLDR, (1 << 27)
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cf4d20a6
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laforge
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#elif defined(PICC)
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.equ PIO_BOOTLDR, (1 << 6)
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#elif defined(OLIMEX)
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98 |
cad600d1
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Harald Welte
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/* Olimex SAM7-Pxxx boards have a button B1 on PA19 that is low-active */
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99 |
cf4d20a6
|
laforge
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.equ PIO_BOOTLDR, (1 << 19)
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100 |
ff741ee3
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Harald Welte
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#define CONFIG_DFU_SWITCH_INV
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#elif defined(SIMTRACE)
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.equ PIO_BOOTLDR, (1 << 31)
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103 |
cad600d1
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Harald Welte
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#define CONFIG_DFU_SWITCH_INV
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104 |
cf4d20a6
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laforge
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#else
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105 |
cad600d1
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Harald Welte
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#error please define PIO_BOOTLDR for your board
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106 |
cf4d20a6
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laforge
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#endif
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107 |
ad18651c
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(no author)
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108 |
3b8d8831
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(no author)
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109 |
00882453
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(no author)
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/* #include "AT91SAM7S64_inc.h" */
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/* Exception Vectors in RAM */
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.text
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.arm
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.section .vectram, "ax"
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a97e460b
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laforge
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.global _remap_call_dfu
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.func _remap_call_dfu
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_remap_call_dfu:
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led1on
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/* Remap RAM to 0x00000000 for DFU */
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00882453
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(no author)
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ldr r1, =AT91C_BASE_AIC
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mov r2, #0x01
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str r2, [r1, #AIC_MCR_RCR]
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125 |
a97e460b
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laforge
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126 |
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ldr r4, =dfu_main
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bx r4
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128 |
00882453
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(no author)
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129 |
a97e460b
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laforge
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.size _remap_call_dfu, . - _remap_call_dfu
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130 |
00882453
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(no author)
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.endfunc
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3b8d8831
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(no author)
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#;------------------------------------------------------------------------------
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#;- Section Definition
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#;-----------------
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#;- Section
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#;- .internal_ram_top Top_Stack: used by the cstartup for vector initalisation
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#;- management defined by ld and affect from ldscript
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#;------------------------------------------------------------------------------
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.section .internal_ram_top
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.code 32
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.align 0
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.global Top_Stack
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Top_Stack:
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/*------------------------------------------------------------------------------
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*- Area Definition
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*------------------------------------------------------------------------------
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* .text is used instead of .section .text so it works with arm-aout too. */
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.section .reset
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.text
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reset:
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/*------------------------------------------------------------------------------
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154 |
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//*- Exception vectors
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//*--------------------
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//*- These vectors can be read at address 0 or at RAM address
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//*- They ABSOLUTELY requires to be in relative addresssing mode in order to
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//*- guarantee a valid jump. For the moment, all are just looping.
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//*- If an exception occurs before remap, this would result in an infinite loop.
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//*- To ensure if a exeption occurs before start application to infinite loop.
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//*------------------------------------------------------------------------------*/
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B InitReset /* 0x00 Reset handler */
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undefvec:
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B undefvec /* 0x04 Undefined Instruction */
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swivec:
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B swivec /* 0x08 Software Interrupt */
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pabtvec:
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B pabtvec /* 0x0C Prefetch Abort */
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dabtvec:
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171 |
a97e460b
|
laforge
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b dabtvec /* 0x10 Data Abort */
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3b8d8831
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(no author)
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rsvdvec:
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173 |
a97e460b
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laforge
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b rsvdvec /* 0x14 reserved */
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3b8d8831
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(no author)
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irqvec:
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a97e460b
|
laforge
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b IRQ_Handler_Entry /* 0x18 IRQ */
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fiqvec:
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177 |
0a3534e7
|
laforge
|
ldr pc, [pc, #-0xF20] /* 0x1c FIQ */
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179 |
a97e460b
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laforge
|
dfu_state_dummy:
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180 |
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.word 0
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181 |
0a3534e7
|
laforge
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182 |
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.global IRQ_Handler_Entry
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183 |
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.func IRQ_Handler_Entry
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184 |
a97e460b
|
laforge
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185 |
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FIQ_Handler_Entry:
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186 |
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187 |
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/*- Switch in SVC/User Mode to allow User Stack access for C code */
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/* because the FIQ is not yet acknowledged*/
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189 |
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/*- Save and r0 in FIQ_Register */
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mov r9, r0
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192 |
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ldr r0, [r8, #AIC_FVR]
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193 |
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msr CPSR_c, #I_BIT | F_BIT | ARM_MODE_SVC
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194 |
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195 |
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/*- Save scratch/used registers and LR in User Stack */
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196 |
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stmfd sp!, { r1-r3, r12, lr}
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197 |
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198 |
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/*- Branch to the routine pointed by the AIC_FVR */
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199 |
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mov r14, pc
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bx r0
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201 |
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202 |
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/*- Restore scratch/used registers and LR from User Stack */
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203 |
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ldmia sp!, { r1-r3, r12, lr}
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204 |
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205 |
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/*- Leave Interrupts disabled and switch back in FIQ mode */
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206 |
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msr CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ
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207 |
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208 |
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/*- Restore the R0 ARM_MODE_SVC register */
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209 |
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mov r0,r9
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210 |
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211 |
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/*- Restore the Program Counter using the LR_fiq directly in the PC */
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212 |
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subs pc, lr, #4
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213 |
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214 |
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IRQ_Handler_Entry:
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215 |
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216 |
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/*- Manage Exception Entry */
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217 |
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/*- Adjust and save LR_irq in IRQ stack */
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218 |
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sub lr, lr, #4
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219 |
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stmfd sp!, {lr}
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220 |
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221 |
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/*- Save SPSR need to be saved for nested interrupt */
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222 |
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mrs r14, SPSR
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223 |
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stmfd sp!, {r14}
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224 |
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225 |
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/*- Save and r0 in IRQ stack */
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226 |
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stmfd sp!, {r0}
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227 |
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228 |
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/*- Write in the IVR to support Protect Mode */
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229 |
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/*- No effect in Normal Mode */
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230 |
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/*- De-assert the NIRQ and clear the source in Protect Mode */
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231 |
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ldr r14, =AT91C_BASE_AIC
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232 |
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ldr r0 , [r14, #AIC_IVR]
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233 |
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str r14, [r14, #AIC_IVR]
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234 |
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235 |
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/*- Enable Interrupt and Switch in Supervisor Mode */
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236 |
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msr CPSR_c, #ARM_MODE_SVC
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237 |
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238 |
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/*- Save scratch/used registers and LR in User Stack */
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239 |
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stmfd sp!, { r1-r3, r12, r14}
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240 |
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241 |
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/*- Branch to the routine pointed by the AIC_IVR */
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242 |
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mov r14, pc
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243 |
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bx r0
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244 |
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245 |
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/*- Restore scratch/used registers and LR from User Stack*/
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246 |
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ldmia sp!, { r1-r3, r12, r14}
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247 |
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248 |
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/*- Disable Interrupt and switch back in IRQ mode */
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249 |
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msr CPSR_c, #I_BIT | ARM_MODE_IRQ
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250 |
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251 |
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/*- Mark the End of Interrupt on the AIC */
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252 |
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ldr r14, =AT91C_BASE_AIC
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253 |
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str r14, [r14, #AIC_EOICR]
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254 |
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255 |
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/*- Restore SPSR_irq and r0 from IRQ stack */
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256 |
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ldmia sp!, {r0}
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257 |
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258 |
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/*- Restore SPSR_irq and r0 from IRQ stack */
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259 |
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ldmia sp!, {r14}
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260 |
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msr SPSR_cxsf, r14
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261 |
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262 |
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/*- Restore adjusted LR_irq from IRQ stack directly in the PC */
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263 |
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ldmia sp!, {pc}^
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264 |
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265 |
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.size IRQ_Handler_Entry, . - IRQ_Handler_Entry
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266 |
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.endfunc
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267 |
3b8d8831
|
(no author)
|
.align 0
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268 |
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.RAM_TOP:
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269 |
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.word Top_Stack
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270 |
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271 |
a97e460b
|
laforge
|
.global _startup
|
272 |
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.func _startup
|
273 |
3b8d8831
|
(no author)
|
InitReset:
|
274 |
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/*------------------------------------------------------------------------------
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275 |
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/*- Low level Init (PMC, AIC, ? ....) by C function AT91F_LowLevelInit
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276 |
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/*------------------------------------------------------------------------------*/
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277 |
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.extern AT91F_LowLevelInit
|
278 |
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/*- minumum C initialization */
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279 |
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/*- call AT91F_LowLevelInit( void) */
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280 |
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281 |
520784c7
|
(no author)
|
ldr r13,.RAM_TOP /* temporary stack in internal RAM */
|
282 |
3b8d8831
|
(no author)
|
/*--Call Low level init function in ABSOLUTE through the Interworking */
|
283 |
520784c7
|
(no author)
|
ldr r0,=AT91F_LowLevelInit
|
284 |
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mov lr, pc
|
285 |
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bx r0
|
286 |
|
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ledinit
|
287 |
3b8d8831
|
(no author)
|
|
288 |
|
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/*------------------------------------------------------------------------------
|
289 |
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//*- Top of Stack Definition
|
290 |
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//*-------------------------
|
291 |
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//*- Interrupt and Supervisor Stack are located at the top of internal memory in
|
292 |
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//*- order to speed the exception handling context saving and restoring.
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293 |
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//*- ARM_MODE_SVC (Application, C) Stack is located at the top of the external memory.
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294 |
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//*------------------------------------------------------------------------------*/
|
295 |
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|
296 |
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.EQU ARM_MODE_FIQ, 0x11
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297 |
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.EQU ARM_MODE_IRQ, 0x12
|
298 |
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.EQU ARM_MODE_SVC, 0x13
|
299 |
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300 |
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.EQU I_BIT, 0x80
|
301 |
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.EQU F_BIT, 0x40
|
302 |
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|
303 |
460ece83
|
laforge
|
|
304 |
|
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#define AT91C_RSTC_RSR 0xFFFFFD04
|
305 |
|
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#define AT91C_RSTC_RSTTYP_SOFTWARE (0x03 << 8)
|
306 |
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#define DFU_STATE_appDETACH 1
|
307 |
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|
308 |
|
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|
309 |
3b8d8831
|
(no author)
|
/*------------------------------------------------------------------------------
|
310 |
|
|
//*- Setup the stack for each mode
|
311 |
|
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//*-------------------------------*/
|
312 |
|
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mov r0,r13
|
313 |
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|
314 |
|
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/*- Set up Fast Interrupt Mode and set FIQ Mode Stack*/
|
315 |
|
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msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
|
316 |
0a3534e7
|
laforge
|
mov r13, r0
|
317 |
|
|
sub r0, r0, #FIQ_Stack_Size
|
318 |
|
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|
319 |
3b8d8831
|
(no author)
|
/*- Init the FIQ register*/
|
320 |
|
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ldr r8, =AT91C_BASE_AIC
|
321 |
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|
322 |
|
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/*- Set up Interrupt Mode and set IRQ Mode Stack*/
|
323 |
|
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msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
|
324 |
|
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mov r13, r0 /* Init stack IRQ */
|
325 |
|
|
sub r0, r0, #IRQ_Stack_Size
|
326 |
0a3534e7
|
laforge
|
|
327 |
3b8d8831
|
(no author)
|
/*- Set up Supervisor Mode and set Supervisor Mode Stack*/
|
328 |
0a3534e7
|
laforge
|
msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
|
329 |
3b8d8831
|
(no author)
|
mov r13, r0 /* Init stack Sup */
|
330 |
|
|
|
331 |
0a3534e7
|
laforge
|
/* - Enable Interrupts and FIQ */
|
332 |
|
|
msr CPSR_c, #ARM_MODE_SVC
|
333 |
|
|
|
334 |
460ece83
|
laforge
|
#ifdef CONFIG_DFU_MAGIC
|
335 |
|
|
ldr r1, =AT91C_RSTC_RSR
|
336 |
|
|
ldr r2, [r1]
|
337 |
|
|
#and r2, r2, AT91C_RSTC_RSTTYP
|
338 |
|
|
tst r2, #AT91C_RSTC_RSTTYP_SOFTWARE
|
339 |
|
|
beq dfu_magic_end
|
340 |
|
|
|
341 |
|
|
ldr r1, =dfu_state
|
342 |
|
|
ldr r2, [r1]
|
343 |
|
|
cmp r2, #DFU_STATE_appDETACH
|
344 |
|
|
beq _reloc_dfu
|
345 |
|
|
dfu_magic_end:
|
346 |
|
|
#endif
|
347 |
|
|
|
348 |
4c36166b
|
laforge
|
# Relocate DFU .data.shared section (Copy from ROM to RAM)
|
349 |
3b8d8831
|
(no author)
|
LDR R1, =_etext
|
350 |
4c36166b
|
laforge
|
LDR R2, =_data_shared
|
351 |
|
|
LDR R3, =_edata_shared
|
352 |
|
|
LoopRelDS: CMP R2, R3
|
353 |
3b8d8831
|
(no author)
|
LDRLO R0, [R1], #4
|
354 |
|
|
STRLO R0, [R2], #4
|
355 |
4c36166b
|
laforge
|
BLO LoopRelDS
|
356 |
3b8d8831
|
(no author)
|
|
357 |
4c36166b
|
laforge
|
/*
|
358 |
a97e460b
|
laforge
|
# Clear DFU .bss section (Zero init)
|
359 |
3b8d8831
|
(no author)
|
MOV R0, #0
|
360 |
|
|
LDR R1, =__bss_start__
|
361 |
|
|
LDR R2, =__bss_end__
|
362 |
|
|
LoopZI: CMP R1, R2
|
363 |
|
|
STRLO R0, [R1], #4
|
364 |
|
|
BLO LoopZI
|
365 |
4c36166b
|
laforge
|
*/
|
366 |
3b8d8831
|
(no author)
|
|
367 |
a97e460b
|
laforge
|
/* prepare c function call to main */
|
368 |
|
|
mov r0, #0 /* argc = 0 */
|
369 |
|
|
ldr lr, =exit
|
370 |
706ffa9f
|
laforge
|
ldr r10, =0x00104000
|
371 |
520784c7
|
(no author)
|
|
372 |
a97e460b
|
laforge
|
#ifdef CONFIG_DFU_SWITCH
|
373 |
|
|
/* check whether bootloader button is pressed */
|
374 |
|
|
ldr r1, =AT91C_PMC_PCER
|
375 |
|
|
mov r2, #(1 << AT91C_ID_PIOA)
|
376 |
|
|
str r2, [r1]
|
377 |
00882453
|
(no author)
|
|
378 |
a97e460b
|
laforge
|
ldr r1, =AT91C_BASE_PIOA
|
379 |
|
|
ldr r2, [r1, #PIOA_PDSR]
|
380 |
|
|
tst r2, #PIO_BOOTLDR
|
381 |
cad600d1
|
Harald Welte
|
#ifdef CONFIG_DFU_SWITCH_INV
|
382 |
|
|
beq _reloc_dfu
|
383 |
|
|
#else
|
384 |
4c36166b
|
laforge
|
bne _reloc_dfu
|
385 |
cad600d1
|
Harald Welte
|
#endif /* SWITCH_INV */
|
386 |
a97e460b
|
laforge
|
#endif
|
387 |
|
|
|
388 |
|
|
bx r10
|
389 |
|
|
|
390 |
4c36166b
|
laforge
|
_reloc_dfu:
|
391 |
|
|
/* Relocate DFU .data section (Copy from ROM to RAM) */
|
392 |
20b657d7
|
laforge
|
LDR R1, =_data_flash
|
393 |
4c36166b
|
laforge
|
LDR R2, =_data
|
394 |
|
|
LDR R3, =_edata
|
395 |
|
|
LoopRel: CMP R2, R3
|
396 |
|
|
LDRLO R0, [R1], #4
|
397 |
|
|
STRLO R0, [R2], #4
|
398 |
|
|
BLO LoopRel
|
399 |
|
|
|
400 |
|
|
/* Clear DFU .bss section (Zero init) */
|
401 |
|
|
MOV R0, #0
|
402 |
|
|
LDR R1, =__bss_start__
|
403 |
|
|
LDR R2, =__bss_end__
|
404 |
|
|
LoopZI: CMP R1, R2
|
405 |
|
|
STRLO R0, [R1], #4
|
406 |
|
|
BLO LoopZI
|
407 |
a97e460b
|
laforge
|
|
408 |
4c36166b
|
laforge
|
/* relocate DFU .text into RAM */
|
409 |
a97e460b
|
laforge
|
ldr r1, =0x00100000
|
410 |
|
|
ldr r2, =0x00200000
|
411 |
|
|
ldr r3, =_etext
|
412 |
|
|
add r3, r3, r2
|
413 |
|
|
loop_rel_t: cmp r2, r3
|
414 |
|
|
ldrlo r4, [r1], #4
|
415 |
|
|
strlo r4, [r2], #4
|
416 |
|
|
blo loop_rel_t
|
417 |
|
|
ldr r4, =_remap_call_dfu
|
418 |
|
|
bx r4
|
419 |
|
|
|
420 |
3d60f2e0
|
Bjoern Kerler
|
.size InitReset,.-InitReset
|
421 |
3b8d8831
|
(no author)
|
.endfunc
|
422 |
a97e460b
|
laforge
|
|
423 |
|
|
/* "exit" dummy to avoid sbrk write read etc. needed by the newlib default "exit" */
|
424 |
|
|
.global exit
|
425 |
|
|
.func exit
|
426 |
|
|
exit:
|
427 |
|
|
b .
|
428 |
|
|
.size exit, . - exit
|
429 |
|
|
.endfunc
|
430 |
|
|
|
431 |
|
|
/*---------------------------------------------------------------
|
432 |
|
|
//* ?EXEPTION_VECTOR
|
433 |
|
|
//* This module is only linked if needed for closing files.
|
434 |
|
|
//*---------------------------------------------------------------*/
|
435 |
|
|
.global AT91F_Default_FIQ_handler
|
436 |
|
|
.func AT91F_Default_FIQ_handler
|
437 |
|
|
AT91F_Default_FIQ_handler:
|
438 |
|
|
b AT91F_Default_FIQ_handler
|
439 |
|
|
.size AT91F_Default_FIQ_handler, . - AT91F_Default_FIQ_handler
|
440 |
|
|
.endfunc
|
441 |
|
|
|
442 |
|
|
.global AT91F_Default_IRQ_handler
|
443 |
|
|
.func AT91F_Default_IRQ_handler
|
444 |
|
|
AT91F_Default_IRQ_handler:
|
445 |
|
|
b AT91F_Default_IRQ_handler
|
446 |
|
|
.size AT91F_Default_IRQ_handler, . - AT91F_Default_IRQ_handler
|
447 |
|
|
.endfunc
|
448 |
|
|
|
449 |
|
|
.global AT91F_Spurious_handler
|
450 |
|
|
.func AT91F_Spurious_handler
|
451 |
|
|
AT91F_Spurious_handler:
|
452 |
|
|
b AT91F_Spurious_handler
|
453 |
|
|
.size AT91F_Spurious_handler, . - AT91F_Spurious_handler
|
454 |
|
|
.endfunc
|
455 |
|
|
|
456 |
|
|
|
457 |
|
|
|
458 |
3b8d8831
|
(no author)
|
.end
|