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09a4935f
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laforge
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/* SPI DAC AD5300 Driver for OpenPICC
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* (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
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* All bugs added by Henryk Pl?tz <henryk@ploetzli.ch>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <sys/types.h>
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#include <lib_AT91SAM7.h>
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#include "../openpcd.h"
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static const AT91PS_SPI spi = AT91C_BASE_SPI;
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void da_comp_carr(u_int8_t position)
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{
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volatile int i;
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while (!(spi->SPI_SR & AT91C_SPI_TDRE)) { }
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AT91F_PIO_ClearOutput(AT91C_BASE_PIOA, OPENPICC_PIO_SS2_DT_THRESH);
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/* shift four left, since it is an eight-bit value written as 16 bit xfer
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bits 15 and 14 are don't care
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bits 13 and 12 are mode (0 is normal operation)
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bits 11 thru 4 are data
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bits 3 thru 0 are don't care
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*/
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spi->SPI_TDR = position << 4;
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while (!(spi->SPI_SR & AT91C_SPI_TDRE)) { }
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for (i = 0; i < 0xff; i++) { }
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AT91F_PIO_SetOutput(AT91C_BASE_PIOA, OPENPICC_PIO_SS2_DT_THRESH);
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}
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void da_init(void)
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{
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AT91F_SPI_CfgPMC();
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AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA,
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AT91C_PA13_MOSI | AT91C_PA14_SPCK, 0);
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AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, OPENPICC_PIO_SS2_DT_THRESH);
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AT91F_PIO_SetOutput(AT91C_BASE_PIOA, OPENPICC_PIO_SS2_DT_THRESH);
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#if 0
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AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_SPI,
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OPENPCD_IRQ_PRIO_SPI,
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AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &spi_irq);
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AT91G_AIC_EnableIt(AT9C_BASE_AIC, AT91C_ID_SPI);
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#endif
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AT91F_SPI_CfgMode(spi, AT91C_SPI_MSTR |
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AT91C_SPI_PS_FIXED | AT91C_SPI_MODFDIS);
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/* CPOL = 1, NCPHA = 1, CSAAT = 0, BITS = 1000, SCBR = 13 (3.69MHz),
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* DLYBS = 6 (125nS), DLYBCT = 0 */
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AT91F_SPI_CfgCs(spi, 0, AT91C_SPI_CPOL | AT91C_SPI_BITS_16 |
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AT91C_SPI_NCPHA | (13 << 8) | (6 << 16));
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AT91F_SPI_Enable(spi);
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}
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