Osmo-clock-conv » History » Version 12
laforge, 10/16/2020 07:57 AM
| 1 | 1 | laforge | h1. osmo-clock-conv |
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| 3 | 7 | laforge | The osmo-clock-conv is a small board for low-jitter conversion of a sine clock into a square clock, based around the "LTC6957-4":https://www.analog.com/en/products/ltc6957-1.html. |
| 4 | 5 | laforge | |
| 5 | 4 | laforge | !osmo-clock-conv-v1-top.jpg! |
| 6 | 1 | laforge | |
| 7 | 6 | laforge | !osmo-clock-conv-bgt1.jpg! |
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| 9 | 12 | laforge | h2. LEDs |
| 10 | |||
| 11 | h3. LED1 - bottom |
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| 12 | |||
| 13 | indicator vor V+ supply voltage rail |
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| 14 | |||
| 15 | h3. LED2 - top |
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| 16 | |||
| 17 | indicator for VDD voltage rail |
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| 18 | |||
| 19 | h2. Jumpers |
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| 20 | |||
| 21 | h3. JP6 - VDD selection |
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| 22 | |||
| 23 | There are three potential sources for the VDD voltage: |
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| 24 | |||
| 25 | * *VDD uses V+ rail* (output of internal LDO): JP6 on pins 2-3 |
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| 26 | * *external VDD source*: voltage can be supplied on pin 3 |
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| 27 | * *external LDO*: can be placed between JP6 pin 1 (V_IN supply) and 3 (regulated VDD output) |
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| 28 | |||
| 29 | h3. FILTA, FILTB |
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| 30 | |||
| 31 | Please see the LTC6957 data sheet |
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| 32 | |||
| 33 | h3. D1, SD2 |
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| 34 | |||
| 35 | Please see the LTC6957 data sheet |
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| 36 | |||
| 37 | h3. JP7 - single-ended vs. differential input |
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| 38 | |||
| 39 | If JP7 is closed, it disables the inverting clock input (IN-) of the LTC6957. X6/X2 can no longer be used. |
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| 41 | |||
| 42 | 2 | laforge | h2. Connectors |
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| 44 | h3. K1 - External 5V DC input |
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| 45 | |||
| 46 | This is the power input for an external 5V DC power supply. |
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| 47 | |||
| 48 | *Use only either K1 or JP5!* |
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| 49 | |||
| 50 | h3. JP5 - Internal 5V DC input |
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| 51 | |||
| 52 | In case *osmo-clock-conv* is part of a larger assembly/device, you may already have a 5V DC supply internally. |
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| 53 | |||
| 54 | *Use only either K1 or JP5!* |
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| 55 | |||
| 56 | h3. X5/X1 |
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| 57 | |||
| 58 | 10 | laforge | * if you use differential input (JP7 open): non-inverting clock input |
| 59 | * if you use single-ended input (JP7 closed): clock input |
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| 60 | 8 | laforge | |
| 61 | 1 | laforge | h3. X6/X2 |
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| 63 | 10 | laforge | * if you use differential input (JP7 open): inverting clock input |
| 64 | * if you use single-ended input (JP7 closed): unused |
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| 65 | 9 | laforge | |
| 66 | 2 | laforge | h3. X7/X3 |
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| 68 | 11 | laforge | Clock output "OUT1", AC-coupled |
| 69 | |||
| 70 | 2 | laforge | h3. X8/X4 |
| 71 | 11 | laforge | |
| 72 | Clock output "OUT2", AC-coupled |
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| 73 | 2 | laforge | |
| 74 | h2. Schematics |
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| 75 | |||
| 76 | 1 | laforge | !osmo-clock-conv-v1-sch.png! |
| 77 | 2 | laforge | |
| 78 | h2. PCB layout |
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| 79 | |||
| 80 | The PCB design is a dual-layer board in 100x50mm size. All connectors are exposed on one edge. |
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| 81 | 1 | laforge | |
| 82 | !osmo-clock-conv-v1-top.png! |
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| 83 | 3 | laforge | |
| 84 | h2. Design Files |
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| 85 | |||
| 86 | The design files can be found in the @osmo-small-hardware.git@ repository. Web access is provided via https://git.osmocom.org/osmo-small-hardware/tree/clock-converter |
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| 87 | |||
| 88 | h2. Availability |
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| 89 | |||
| 90 | This project is currently in the design verification stage. Once the verification has completed, it is expected that osmo-clock-conv boards will be made available via the "sysmocom webshop":https://shop.sysmocom.de/. |
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| 91 | |||
| 92 | |||
| 93 | h2. License |
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| 94 | |||
| 95 | The osmo-clock-conv design is made available as Open Source Hardware (OSHW) licensed under CC-BY-SA (Creative Commons Attribution Share-Alike). |
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| 96 | |||
| 97 | This means anyone can use the design to build units, or to create derivative versions of the design. However, you have to give attribution and release your derivative works under the same license as the original project. |
