TypicalCalypsoModemDesign » History » Version 14
laforge, 06/12/2024 08:20 AM
1 | 8 | laforge | h1. Typical Ti Calypso baseband modem design |
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3 | 1 | laforge | This is the standard Ti Calypso-based modem design used in many phones, including the Compal-built Motorola C1xx phones and |
4 | 6 | laforge | also the Openmoko GTA01 (Neo1973) and GTA02 (FreeRunner) and possibly a number of other older FIC GSM products. |
5 | 5 | laforge | |
6 | 1 | laforge | It is a typically a dual- or tri-band GSM modem design with or without support for GPRS. |
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8 | 8 | laforge | |
9 | h2. Block Schematic |
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11 | 1 | laforge | The block layout of this modem looks like this: |
12 | 11 | zecke | {{thumbnail(calypso-block.png, size=400)}} |
13 | 1 | laforge | |
14 | 8 | laforge | * Yellow: Clocks |
15 | * Red: Digital Serial interfaces like SPI |
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16 | * Green: Analog I/Q differential baseband data |
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17 | * Magenta: RF signals |
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18 | * Blue: TSP, the time sequence port, sometimes parallel, sometimes serial |
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19 | 1 | laforge | |
20 | 8 | laforge | |
21 | h2. Circuit Description |
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23 | 1 | laforge | This is only a simplified version, ignoring the time constraints, sequencing of power-on/off events, AFC, AGC and APC. |
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26 | 8 | laforge | h3. GSM Rx Path |
27 | 1 | laforge | |
28 | 8 | laforge | * the GSM signal from a BTS is picked up by the antenna |
29 | * it reaches the Antenna Switch Module (ASM), typically a diode or MEMS switch |
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30 | ** the Antenna Switch is configured to connect the antenna to one of the GSM/DCS/PCS Rx paths |
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31 | * the RF signal goes through Rx SAW filters to remove any out-of-band frequencies |
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32 | * the RF signal reaches the TRF6151/[[Rita]] zero-IF GSM Transceiver, where it is |
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33 | ** amplified and further filtered |
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34 | ** mixed with the frequency of the TRF6151-builtin VCO |
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35 | ** exported as analog I/Q signals |
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36 | * The analog I/Q is input into the TWL3025/[[Iota]] ABB, where it is |
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37 | ** sampled by an ADC |
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38 | ** sent as serial stream of I+Q samples to the DBB via the BSP |
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39 | * In the DBB, the signal is |
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40 | ** received on the RIF (Radio Inter Face) and DMA'ed into DSP API RAM |
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41 | ** processed by the [[HardwareCalypsoDSP]] DSP core inside the Calypso DBB |
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42 | ** converted into results (e.g. a MAC block) that is sent to the ARM via API RAM |
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43 | * The ARM in the Calypso DBB then runs the GSM protocol stack |
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44 | 6 | laforge | |
45 | 8 | laforge | |
46 | h3. GSM Tx Path |
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47 | |||
48 | * The ARM inside the Calypso DBB |
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49 | ** generates some data (e.g. a MAC block) to be transmitted |
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50 | ** writes this data plus associated commands in the API RAM |
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51 | * The DSP inside the Calypso DBB |
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52 | ** executes this command during the next TDMA frame interrupt |
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53 | ** performs forward error correction, interleaving, encryption (optional) |
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54 | ** sends the GSM burst bits via the BSP to the ABB |
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55 | * The TWL3025/[[Iota]] ABB |
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56 | ** receives burst bits via BSP and stores them in the burst buffer |
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57 | ** runs those burst bits through a hardware GSMK modulator when triggered by BULENA on the TSP |
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58 | ** outputs an Analog I/Q baseband GMSK signal to the TRF6151 |
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59 | * The TRF6151/[[Rita]] Transceiver |
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60 | ** mixes the analog I/Q baseband signal with the VCO frequency |
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61 | ** sends the resulting GSM-band frequency to the RF3166 |
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62 | * The RF3166 RF Power Amplififer |
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63 | ** amplifies the signal according to the analog level of the APC |
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64 | ** forwards the amplified signal to the Antenna Switch |
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65 | * The ASM4532 antenna switch |
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66 | ** connects the PA output with the antenna for the duration of the burst |
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69 | h2. Glossary |
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70 | |||
71 | * ABB: Analog Base Band |
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72 | * AFC: Automatic Frequency Correction (tuning of the VTXCO by ABB) |
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73 | * APC: Automatic Power Correction (Tx Power envelope from ABB to PA) |
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74 | * BSP: Baseband Serial Port, like SPI |
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75 | * DBB: Digital Base Band, like SPI |
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76 | * USP: uController Serial Port |
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77 | * VCO: Voltage Controlled Oscillator |
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78 | * RFCLK: A 26MHz master clock generated by the Transceiver |
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79 | * CLK13M: 13MHz system clock provided by DBB |
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80 | * CLK32K: A 32.768kHz RTC clock signal |
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82 | h2. Actual implementation in Motorola C123 |
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83 | 1 | laforge | |
84 | 8 | laforge | |
85 | 14 | laforge | {{thumbnail(c123_pcb.jpg, size=600)}} |
86 | 13 | laforge | |
87 | h2. Calypso Silicon image (top metal layer) |
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89 | See https://siliconpr0n.org/archive/doku.php?id=infosecdj:ti:d751749zhh |