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TSM30Layer1 » History » Version 5

laforge, 02/19/2016 10:49 PM
Add section on L1A tasks

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{{>toc}}
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h2. General Terminlogy
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* L1 sync -- The synchronous side of the Layer 1, triggered by the TDMA frame interrupt issued by the DSP
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* L1 async -- The asynchronous side of the Layer 1, driven by the L2/L3
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h2. Files
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h3. Layer1/L1i/Src/dl1_mem.c
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allocating/receiving/sending signals.
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h3. Layer1/L1i/Src/dl1_pei.c
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create/initialise/close protocol stack entity
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h3. Layer1/L1c/Src/l1_afunc.c
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Functionality related bit and timeslot synchronization
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h3. Layer1/L1c/Inc/l1_defty.h
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DSP shared memory API definitions
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h3. Layer1/L1c/Src/l1_sync.c
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Code driven by TDMA frame interrupt as issued by DSP
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h2. Functions
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h3. Frame/Src/Frame.c:pf_ProcessSystemPrim(USHORT [[TaskHandle]], T_VOID_STRUCT *pPrim)
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called from Frame/Src/vsi_com.c:vsi_c_primitive(), in turn from Layer1/L1i/Src/dl1_mem.c:os_receive_sig(UWORD8 queue)
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whenever the Layer1 receives a Signal.
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h3. Layer1/L1i/Src/dl1_pei.c:pei_run(T_VSI_CHANDLE handle)
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process primitives, called by main loop in the protocol stack entity
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h3. Layer1/L1c/Src/l1_async.c:l1a_task()
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<pre>
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/* L1A (Layer 1 Asynchronous) task function. This        */
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/* function manages the interface between L3 and L1. It  */
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/* is composed with a set of state machine, each machine */
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/* handles a particular GSM functionality. When a        */
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/* message is received in L1_C1 message queue, it is     */
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/* submitted to every state machine. The one which are   */
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/* impacted by the message process it. At the end of     */
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/* "l1a_task()" function, a balance routine is called,   */
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/* it enables L1S tasks consequently to the state machine*/
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/* requests.                                             */
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</pre>
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* iterates over list of primitives, call l1pa_task()
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h3. Layer1/L1c/Src/l1p_asyn.c:l1pa_task(xSignalHeaderRec *msg)
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call into the various lapa_*_process() functions for GPRS
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h3. layer1 asynchronous
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h4. l1a_test_process()
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Hardware test
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h4. l1a_stats_process()
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Statistics or Test process
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h4. l1a_mmi_adc_req()
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ADC conversion
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h4. l1a_freq_band_configuration()
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Frequency Band configuration: GSM900, E-GSM900, DCS1800, DUAL, DUALEXT, PCS 1900
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<pre>
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/* Description : This state machine handles the frequency*/
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/*band configuration: E_GSM900, GSM900, DCS1800, PCS1900,*/
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/*DUAL, DUALEXT, DUALEXT_PCS1900...                      */
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/*                                                       */
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/* Starting messages:        MPHC_INIT_L1_REQ            */
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/*                                                       */
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/* Result messages (input):  none                        */
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/* Result messages (output): MPHC_INIT_L1_CON           */
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/* Reset messages (input):   none                        */
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</pre>
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h4. l1a_initial_network_sync_process()
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Synchronization with a Neighbour cell for Cell Selection
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<pre>
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/* Description : This state machine handles the 1st      */
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/* synchronization with the network.                     */
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/*                                                       */
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/* Starting messages:        MPHC_NETWORK_SYNC_REQ       */
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/*                                                       */
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/* Result messages (input):  L1C_FB_INFO                 */
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/*                           L1C_SB_INFO                 */
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/*                                                       */
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/* Result messages (output): MPHC_NETWORK_SYNC_IND       */
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/*                                                       */
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/* Reset messages (input):   MPHC_STOP_NETWORK_SYNC_REQ  */
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/*                          (MPHC_STOP_NETWORK_SYNC_CON) */
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</pre>
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h4. l1a_network_lost()
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lost Network
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h4. l1a_full_list_meas_process()
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Full list receive level monitoring
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<pre>
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/* Description:                                          */
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/* ------------                                          */
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/* This function is a state machine which handles the    */
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/* Cell Selection Full List Power Measurement L1/L3      */
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/* interface and it handles the neigbour cell            */
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/* measurement process in IDLE mode with FULL list.      */
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/* When a message MPHC_RXLEV_REQ is received             */
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/* the L1S task FSMS_MEAS is enabled. When this task     */
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/* is completed a reporting message L1C_VALID_MEAS_INFO */
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/* is received and forwarded to L3.                      */
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/*                                                       */
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/* Starting messages:        MPHC_RXLEV_REQ.             */
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/*                                                       */
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/* Result messages (input):  L1C_VALID_MEAS_INFO        */
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/*                                                       */
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/* Result messages (output): MPHC_RXLEV_IND              */
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/*                                                       */
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/* Reset messages (input):   none                        */
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/*                                                       */
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/* Stop message (input):     MPHC_STOP_RXLEV_REQ         */
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/*                                                       */
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/* Stop message (output):    MPHC_STOP_RXLEV_CON         */
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/*                                                       */
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/* Rem:                                                  */
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/* ----                                                  */
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/* L3 is in charge of the number of pass to follow the   */
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/* GSM recommendation.                                   */
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</pre>
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h4. l1a_idle_ba_list_meas_process()
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<pre>
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/* Description : This state machine handles neigbor cell */
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/* measurement process in IDLE mode with BA list.        */
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/*                                                       */
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/* Starting messages:        MPHC_RXLEV_PERIODIC_REQ     */
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/* ------------------                                    */
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/*  L1 starts then the periodic BA list receive level    */
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/*  monitoring.                                          */
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/*                                                       */
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/* Subsequent messages:      MPHC_RXLEV_PERIODIC_REQ     */
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/* --------------------                                  */
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/*  L1 changes the BA list and starts the periodic BA    */
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/*  list receive level monitoring with this new list.    */
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/*                                                       */
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/* Result messages (input):  L1C_RXLEV_PERIODIC_DONE      */
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/* ------------------------                              */
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/*  This is the periodic reporting message from L1s.     */
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/*                                                       */
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/* Result messages (output): MPHC_RXLEV_PERIODIC_IND     */
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/* -------------------------                             */
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/*  This is the periodic reporting message to L3.        */
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/*                                                       */
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/* Reset messages (input):   MPHC_STOP_RXLEV_PERIODIC_REQ*/
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/* -----------------------                               */
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/*  BA list neigbor cell measurement process in IDLE     */
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/*  is stopped by this message.                          */
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</pre>
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h4. l1a_idle_6strongest_monitoring_process()
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6 strongest Neighbor cells synchro. monitoring
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<pre>
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/* Description:                                          */
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/* ------------                                          */
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/* This function is a state machine which handles the    */
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/* synchronization with up to 6 neighbor cells           */
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/*                                                       */
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/* Starting messages:        MPHC_NCELL_SYNC_REQ         */
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/* ------------------        MPHC_NCELL_LIST_SYNC_REQ    */
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/*  L1 makes an attempt to read the FB/SB or to confirm  */
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/*  SB.                                                  */
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/*                                                       */
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/*                                                       */
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/* Result messages (input):  L1C_FB_INFO                 */
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/* ------------------------  L1C_SB_INFO                 */
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/*                           L1C_SBCONF_INFO             */
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/*  Result messages from L1S. FB detection, SB detection,*/
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/*  SB confirmation.                                     */
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/*                                                       */
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/* Result messages (output): MPHC_NCELL_SYNC_IND         */
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/* -------------------------                             */
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/*  SB indication.                                       */
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/*                                                       */
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/* Reset messages (input):   MPHC_STOP_NCELL_SYNC_REQ    */
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/* -----------------------  (MPHC_STOP_NCELL_SYNC_CON)   */
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</pre>
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h4. l1a_neighbour_cell_bcch_reading_process()
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6 strongest Neighbor cells BCCH reading
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<pre>
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/* Description:                                          */
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/* ------------                                          */
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/* This function is a state machine which handles the    */
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/* BCCH reading from up to 6 neighbour cells             */
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/*                                                       */
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/* Starting messages:         MPHC_NCELL_BCCH_REQ        */
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/* ------------------                                    */
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/*                                                       */
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/* Result messages (input):   L1C_BCCHN_INFO             */
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/* ------------------------                              */
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/*                                                       */
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/* Result messages (output):  MPHC_NCELL_BCCH_IND        */
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/* -------------------------                             */
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/*                                                       */
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/* Reset messages (input):    MPHC_STOP_NCELL_BCCH_REQ   */
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/* -----------------------   (MPHC_STOP_NCELL_BCCH_CON)  */
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</pre>
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h4. l1a_idle_serving_cell_bcch_reading_process()
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Serving Cell BCCH reading
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<pre>
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/* Starting messages:        MPHC_SCELL_NBCCH_REQ        */
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/* ------------------        MPHC_SCELL_EBCCH_REQ        */
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/*                                                       */
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/*  L1 continuously reads the serving cell BCCH and/or   */
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/*  Extended BCCH as requested by the scheduling info.   */
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/*                                                       */
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/* Result messages (input):  L1C_BCCHS_INFO              */
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/* ------------------------                              */
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/*  System information data block from L1S.              */
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/*                                                       */
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/* Reset messages (input):   MPHC_STOP_SCELL_BCCH_REQ    */
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/* -----------------------  (MPHC_STOP_SCELL_BCCH_CON)   */
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</pre>
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h4. l1a_idle_serving_cell_paging_process()
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Serving Cell PAGING reading
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<pre>
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/* Description : This state machine handles paging       */
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/*                                                       */
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/* Starting messages:        MPHC_START_CCCH_REQ         */
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/* ------------------                                    */
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/*                                                       */
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/*  L1 continuously reads the serving cell BCCH and/or   */
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/*  Extended BCCH as requested by the scheduling info.   */
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/*                                                       */
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/* Result messages (input):  L1C_ALLC_INFO               */
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/* ------------------------  L1C_NP_INFO                 */
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/*                           L1C_EP_INFO                 */
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/*                                                       */
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/* Reset messages (input):   MPHC_STOP_CCCH_REQ          */
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/* -----------------------  (MPHC_STOP_CCCH_CON)         */
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</pre>
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h4. l1a_idle_smscb_process()
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Short Message Servive Cell Broadcast reading
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<pre>
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/* Description : This state machine handles the SMSCB    */
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/* (Short Message Service Cell Broadcast).               */
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/*                                                       */
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/* Starting messages:        MPHC_CONFIG_CBCH_REQ        */
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/*                                                       */
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/* Subsequent messages:      MPHC_CBCH_SCHEDULE_REQ      */
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/*                           MPHC_CBCH_INFO_REQ          */
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/*                           MPHC_CBCH_UPDATE_REQ        */
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/*                                                       */
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/* Result messages (input):  L1C_CB_INFO                 */
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/*                                                       */
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/* Result messages (output): MPHC_DATA_IND               */
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/*                                                       */
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/* Reset messages (input):   MPHC_STOP_CBCH_REQ          */
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/*                                                       */
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</pre>
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h4. l1a_cres_process()
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Cell reselection process
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Synchronization and requested BCCH reading --> camp on new cell
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<pre>
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/* Description:                                          */
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/* ------------                                          */
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/* This function is a state machine which handles Cell   */
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/* Reselection.                                          */
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/*                                                       */
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/* Starting messages:        MPHC_NEW_SCELL_REQ          */
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/* ------------------                                    */
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/*  L1 camps on the given ARFCN.                         */
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/*                                                       */
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/* Result messages (output): MPHC_NEW_SCELL_CON          */
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</pre>
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The following data is supplied along with the MPHC_NEW_SCELL_REQ message:
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* radio_freq (ARFCN)
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* BSIC
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* time_alignment information
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* fn_offfset (frame number offset)
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Those values are stored in l1s_l1s_com.Scell_info (serving cell info) and the
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SYNCHRO L1S task is marked for execution.
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Finally, MPHC_NEW_SCELL_CON is sent up to L2/3.
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h4. l1a_access_process()
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Link Access Process.
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<pre>
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/* Description : This state machine handles the access   */
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/* to the network while in IDLE mode.                    */
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/*                                                       */
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/* Starting messages:        MPHC_RA_REQ                 */
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/*                                                       */
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/* Subsequent messages:      MPHC_RA_REQ                 */
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/*                                                       */
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/* Result messages (input):  L1C_RA_DONE                 */
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/*                                                       */
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/* Result messages (output): MPHC_RA_CON                 */
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/*                                                       */
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/* Reset message (input): MPHC_STOP_RA_REQ               */
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/*                                                       */
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/* Reset message (input): MPHC_STOP_RA_CON               */
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</pre>
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h4. l1a_dedicated_process()
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Dedicated mode process
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<pre>
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/* Description : This state machine handles the dedicated*/
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/* mode setup (L1A side).                                */
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/*                                                       */
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/* Starting messages:        MPHC_IMMED_ASSIGN_REQ        */
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/*                                                       */
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/* Subsequent messages:      MPHC_CHANNEL_ASSIGN_REQ     */
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/*                           MPHC_SYNC_HO_REQ             */
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/*                           MPHC_PRE_SYNC_HO_REQ         */
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/*                           MPHC_PSEUDO_SYNC_HO_REQ      */
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/*                           MPHC_ASYNC_HO_REQ            */
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/*                           MPHC_ASYNC_HO_COMPLETE       */
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/*                           MPHC_HANDOVER_FAIL_REQ       */
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/*                           MPHC_CHANGE_FREQUENCY        */
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/*                           OML1_CLOSE_TCH_LOOP_REQ     */
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/*                           OML1_OPEN_TCH_LOOP_REQ      */
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/*                           OML1_START_DAI_TEST_REQ     */
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/*                           OML1_STOP_DAI_TEST_REQ      */
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/*                                                       */
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/* Result messages (input):  L1C_DEDIC_DONE              */
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/*                           L1C_SACCH_INFO              */
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/*                                                       */
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/* Result messages (output): MPHC_CHANNEL_ASSIGN_CON      */
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/*                           MPHC_SYNC_HO_CON             */
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/*                           MPHC_PRE_SYNC_HO_CON         */
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/*                           MPHC_PSEUDO_SYNC_HO_CON      */
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/*                           MPHC_ASYNC_HO_CON            */
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/*                           MPHC_TA_FAIL_IND             */
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/*                           MPHC_DATA_IND               */
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/*                           OML1_CLOSE_TCH_LOOP_CON     */
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/*                           OML1_OPEN_TCH_LOOP_CON      */
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/*                           OML1_START_DAI_TEST_CON     */
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/*                           OML1_STOP_DAI_TEST_CON      */
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/*                                                       */
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/* Reset messages (input):   MPHC_CHANNEL_RELEASE         */
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</pre>
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h4. l1a_dedic6_process
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6 strongest Neighbor cells synchro. monitoring and BCCH reading
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<pre>
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/* Description : This state machine handles the 6 strong.*/
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/* neighbor cells management in dedicated mode.          */
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/*                                                       */
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/* Remark: in dedicated mode there is no reason to use   */
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/* the task parameters semaphores since there is no      */
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/* ambiguity and no asynchronous/synchronous conflict to */
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/* care about.                                           */
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/*                                                       */
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/* Starting messages:        L1C_DEDIC_DONE              */
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/*                                                       */
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/* Result messages (input):  L1C_FB_INFO                 */
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/*                           L1C_SB_INFO                 */
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/*                           L1C_SBCONF_INFO             */
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/*                                                       */
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/* Reset messages (input):   MPHC_CHANNEL_RELEASE         */
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</pre>
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h3. layer 1 synchronous
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h4. Layer1/L1c/Src/l1_sync.c:hisr()
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Interrupt Service Routine called by the DSP TDMA frame interrupt
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* Calls l1s_synch()
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h4. Layer1/L1c/Src/l1_sync.c:l1s_synch()
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<pre>
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/* This function is the core of L1S. Here is a summary   */
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/* of the execution:                                     */
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/*                                                       */
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/*  - Frame counters management.                         */
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/*  - Get current communication page pointers.           */
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/*  - RESET internal variables.                          */
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/*  - RESET MCU->DSP DB communication page.              */
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/*  - TOA update management.                             */
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/*                                                       */
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/*  - L1 task manager,                                   */
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/*      - Dedicated_mode_manager.                        */
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/*      - Task_scheduler.                                */
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/*      - Execute_frame.                                 */
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/*      - Neighbor cells measurement manager.            */
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/*      - End manager.                                   */
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</pre>
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h4. l1s_dedicated_mode_manager()
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* assignment of a new channel, changing channel mode, ciphering start, etc.
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h4. l1s_task_scheduler_process()
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<pre>
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/* This function is the task scheduler of L1S. It        */
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/* schedules any enabled task. When a task must start,   */
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/* it becomes PENDING. Since several tasks can become    */
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/* pending at the same time, the highest priority one    */
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/* is elected. The elected task compete then with the    */
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/* current running task. If they conflict, the highest   */
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/* priority one wins. If the winning is the new comer    */
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/* then the multiframe table is reset and the new coming */
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/* task is installed.                                    */
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</pre>
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h4. l1s_execute_frame()
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* call l1s_exec_mftab()
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h4. Layer1/L1c/Src/l1_mfmgr.c:l1s_exec_mftab()
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* Execute functions from MFTAB
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 FIXME
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h4. l1s_meas_manager()
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<pre>
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/* Description:                                          */
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/* ------------                                          */
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/* This function is the measurement tasks manager.       */
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/* The followings tasks are handled:                     */
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/*                                                       */
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/* FSMS_MEAS:                                            */
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/* 1) Full list measurement in Cell Selection            */
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/* The machine performs 1 valid measurement per carrier  */
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/* from the full list of GSM carriers. To achieve 1      */
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/* valid measurement, 2 attempt with 2 different AGC     */
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/* are performed worst case. When all carriers are       */
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/* a reporting message L1C_VALID_MEAS_INFO is built and */
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/* sent to L1A.                                          */
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/*                                                       */
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/* 2) Full list measurement in Idle mode.                */
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/* The machine performs 1 valid measurement per carrier  */
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/* from the full list of GSM carriers. To achieve 1      */
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/* valid measurement, 2 attempt with 2 different AGC     */
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/* are performed worst case. When all carriers are       */
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/* a reporting message L1C_VALID_MEAS_INFO is built and */
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/* sent to L1A.                                          */
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/*                                                       */
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/* I_BAMS_MEAS: BA list measurement in Idle mode.        */
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/* The machine performs 7 measurements per PCH reading   */
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/* (3*2+1) looping on the BA list. When 7 measurements are */
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/* completed (end of PCH) a reporting message            */
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/* L1C_RXLEV_PERIODIC_DONE is built and sent to L1A.      */
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</pre>
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h4. l1s_end_manager()
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* copy page into real time trace buffer
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h4. l1s_increment_time()
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* Increament the various framenumbers by one
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h3. L1A Tasks
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h4. SYNCHRO
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This task synchronizes the L1S to a new cell. 
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It receives input parameters (arfcn, tn_difference, time_alignment) from L2/3 and programs the TPU accordingly.
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There is no DSP task executed as part of SYNCHRO.
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h3. DSP Tasks
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<pre>
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  #define HWTEST       0   // DSP checksum reading
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  #define ADC_CSMODE0  1   // ADC task in CS_MODE0 mode
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  #define DEDIC        2   // Global Dedicated mode switch
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  #define RAACC        3   // Channel access (ul)
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  #define RAHO         4   // Handover access (ul)
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  #define NSYNC        5   // Global Neighbour cell synchro switch
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  #define POLL         6   // Packet Polling (Access)
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  #define PRACH        7   // Packet Random Access Channel
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  #define ITMEAS       8   // Interference measurements
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  #define FBNEW        9   // Frequency burst search (Idle mode)
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  #define SBCONF       10   // Synchro. burst confirmation
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  #define SB2          11  // Synchro. burst read (1 frame uncertainty / SB position)
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  //#define PTCCH        12  // Packet Timing Advance control channel  CCR 9-12-02 BUG02527
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  #define FB26         12  // Frequency burst search, dedic/transfer mode MF26 or MF52
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  #define SB26         13  // Synchro burst search, dedic/transfer mode MF26 or MF52
595
  #define SBCNF26      14  // Synchro burst confirmation, dedic/transfer mode MF26 or MF52
596
  #define FB51         15  // Frequency burst search, dedic mode MF51
597
  #define SB51         16  // Synchro burst search, dedic MF51
598
  #define SBCNF51      17  // Synchro burst confirmation, dedic MF51
599
  #define PDTCH        18  // Packet Data channel
600
  #define BCCHN        19  // BCCH Neighbor in GSM Idle
601
  #define ALLC         20  // All CCCH Reading
602
  #define EBCCHS       21  // Extended BCCH Serving Reading
603
  #define NBCCHS       22  // Normal BCCH Serving       Reading
604
  #define SMSCB        23  // CBCH serving Reading
605
  #define ADL          24  // SACCH(SDCCH) DL
606
  #define AUL          25  // SACCH(SDCCH) UL
607
  #define DDL          26  // SDCCH DL
608
  #define DUL          27  // SDCCH UL
609
  #define TCHD         28  // Dummy for TCH Half rate
610
  #define TCHA         29  // SACCH(TCH)
611
  #define TCHTF        30  // TCH Full rate
612
  #define TCHTH        31  // TCH Half rate
613
  #define PALLC        32  // All PCCCH reading
614
  #define PSMSCB       33  // CBCH serving Reading while in Packet Idle
615
  #define PBCCHS       34  // PBCCH serving reading
616
  #define PNP          35  // Packet Normal paging Reading
617
  #define PEP          36  // Packet Extended paging Reading
618
  #define SINGLE       37  // Single Block for GPRS
619
  #define PBCCHN_TRAN  38  // Packet BCCH Neighbor in Packet Transfer mode.
620
  #define PBCCHN_IDLE  39  // Packet BCCH Neighbor in Idle mode.
621
  #define BCCHN_TRAN   40  // BCCH Neighbour in Packet Transfer mode
622
  #define NP           41  // Normal paging Reading
623
  #define EP           42  // Extended paging   Reading
624
  #define BCCHN_TOP    43  // BCCH Neighbour TOP priority in Idle mode
625
  #define PTCCH        44  // Packet Timing Advance control channel
626
  #define SYNCHRO      45  // synchro task: L1S reset
627
  #define PTS_START_TX_BURST_TEST 46 // PTS transmission test
628
  #define PTS_START_RX_BURST_TEST 47 // PTS receive test
629
  #define PTS_START_FB_BURST_TEST 48 // PTS frequency burst receive test
630
  #define PTS_START_FB26_BURST_TEST 49 // PTS frequency burst receive test
631
  #define PTS_START_SB26_BURST_TEST 50 // PTS frequency burst receive test
632 5 laforge
</pre>
633 1 laforge
634
635 5 laforge
h3. DSP Driver (l1_drive.c)
636 1 laforge
637 5 laforge
638
639
h4. l1ddsp_load_monit_task(API monit_task, fb_mode)
640
641
642 1 laforge
* monit_taks = number of measurements (max 8) + sometimes 0x200
643
* set FB detection algorithm
644
645
646 5 laforge
h4. l1ddsp_load_txpwr(u8 vp_TxPower, u16 vp_Arfcn)
647 1 laforge
648 5 laforge
649
650
h4. l1ddsp_load_rx_task(API rx_task, UWORD8 burst_id, UWORD8 tsq)
651
652
653 1 laforge
Load values into l1s_dsp_com.dsp_db_w_ptr:
654 5 laforge
* d_task_d = rx_task
655
* d_burst_d = burst_id
656
* d_ctrl_system |= tsq << B_TSQ
657 1 laforge
658
659 5 laforge
h4. l1ddsp_load_ra_task(API ra_task)
660 1 laforge
661 5 laforge
* d_task_ra = ra_task
662 1 laforge
663 5 laforge
664
h4. l1ddsp_load_tch_mode(UWORD8 dai_mode, BOOL dtx_allowed)
665
666
667
668
h4. l1ddsp_load_tch_param()
669
670
671
672
h4. l1ddsp_load_ciph_param(UWORD8 a5mode, T_ENCRYPTION_KEY *ciph_key)
673
674 1 laforge
Set
675 5 laforge
* l1s_dsp_com.dsp_ndb_ptr->d_a5mode = a5mode
676
* l1s_dsp_com.dsp_ndb_ptr->a_kc
677 1 laforge
678 5 laforge
679
h4. l1ddsp_stop_tch()
680
681 1 laforge
Set
682 5 laforge
* l1s_dsp_com.dsp_db_w_ptr->d_ctrl_tch |= (B_STOP_TCH_UL|B_STOP_TCH_DL)
683 1 laforge
684
685 5 laforge
h4. l1ddsp_end_scenario()
686 1 laforge
687
688 5 laforge
* l1s_dsp_com.dsp_w_page
689
* l1s_dsp_com.dsp_ndb_ptr->d_dsp_page
690
* call l1dmacro_set_frame_it()
691
692
693
h4. l1dmacro_set_frame_it()
694
695
696 1 laforge
Enable GSM Frame Interrupt on next TDMA frame
697
698
Typically called at the end of processing a TDMA frame interrupt
699
700
701 5 laforge
h4. l1d_reset_hw(UWORD32 offset_value)
702 1 laforge
703 5 laforge
704
705
h3. TPU Macros (Layer1/L1d/src/l1d_Tpu.hm)
706
707
708
709
h4. MC_L1D_TPU_REWIND
710
711 1 laforge
Re-initialize the global current TPU pointer to L1D_TPU_RAM.
712
713 5 laforge
714
h4. MC_L1D_TPU_SLEEP
715
716 1 laforge
Sleep for one TPU tick (instruction 0)
717
718 5 laforge
719
h4. MC_L1D_TPU_MOVE(addr,data)
720
721 1 laforge
Put a MOVE instruction at the current TPU pointer
722
723 5 laforge
724
h4. MC_L1D_TPU_AT(time)
725
726 1 laforge
Put an AT instruction at the current TPU pointer
727
728 5 laforge
729
h4. MC_L1D_TPU_SYNC(time)
730
731 1 laforge
Put a SYNC instruction at the current TPU pointer
732
733 5 laforge
734
h4. MC_L1D_TPU_WAIT(time)
735
736 1 laforge
Put a WAIT instruction at the current TPU pointer
737
738 5 laforge
739
h4. MC_L1D_TPU_OFFSET(time)
740
741 1 laforge
Put a OFFSET instruction at the current TPU pointer
742
743
744 5 laforge
h4. MC_L1D_TSP_ACT_INIT(signal)
745 1 laforge
746 5 laforge
* set v_L1d_TspActValue == signal
747
* issue MC_L1D_TPU_MOVE instructions for L1D_TSP_ACTX and L1D_TSP_ACT
748 1 laforge
749
750 5 laforge
h4. MC_L1D_TSP_ACT_SET(signal)
751 1 laforge
752 5 laforge
* set v_L1d_TspActValue |= signal
753
* issue MC_L1D_TPU_MOVE instructions as required
754 1 laforge
755
756 5 laforge
h4. MC_L1D_TSP_ACT_RESET(signal)
757 1 laforge
758 5 laforge
* unset v_L1d_TspActValue |= signal
759
* issue MC_L1D_TPU_MOVE instructions as required
760 1 laforge
761
762 5 laforge
h3. TPU (Layer1/L1d/src/l1d_Tpu.c)
763 1 laforge
764
765 5 laforge
766
h4. TP_Reset(u16 on)
767
768
* Issue L1D_TPU_CTRL_RESET in L1D_TPU_CTRL register
769
* Wait until reset has been asserted
770
771
772
h4. TP_Enable(u16 on)
773
774
* Set or unset L1D_TPU_CTRL_T_ENBL in L1D_TPU_CTRL
775
776
777
h4. l1dmacro_idle(void)
778
779
780
781
h4. l1dmacro_offset(u32 offset_value, s32 relative_time)
782
783
784
785
h4. l1dmacro_synchro(u32 when, u32 value)
786
787
788
789
h4. TPU_ClkEnable(SYS_UWORD16 on)
790
791
* Set or unset L1D_TPU_CTRL_CLK_EN in TPU_CTRL
792
* wait until change becomes active
793
794
795
h4. TPU_FrameItEnable(void)
796
797
* Enable Frame interrupt by TPU_CTRL_D_ENBL in TPU_CTRL
798
799
800
h4. l1dmacro_set_frame_it(void)
801
802
* Call TPU_FrameItEnable()
803
804 1 laforge
==== l1pdmacro_it_dsp_gen(WORD16 time)
805 5 laforge
* MC_L1D_TPU_AT    (time);
806
* MC_L1D_TPU_MOVE  (L1D_TPU_IT_DSP_PG,0x0001);
807 1 laforge
808
==== l1pdmacro_anchor(WORD16 time)
809 5 laforge
* MC_L1D_TPU_AT    (time);
810 1 laforge
811
812 5 laforge
h4. TPU_check_IT_DSP(void)
813 1 laforge
814 5 laforge
* check if an IT DSP is still pending
815
816
817
h3. RF Frontend Driver
818
819
820
821
h4. l1d0_0ActivateTx (u16 vp_Start, u8 vp_TxPwr, u8 vp_Band)
822
823 1 laforge
Activate TX path of the radio section to transmit a burst
824
825
826 5 laforge
h4. l1d0_1DeactivateTx (u16 vp_Start, u8 vp_TxPwr, u8 vp_Band)
827
828
829
830
h4. l1d0_2CalcArfcnNcntValue(u16 vp_Arfcn, u8 vp_TxRx, u8 vp_Band)
831
832 1 laforge
Calculate N-Counter for RF-PLL
833
834 5 laforge
835
h4. l1d0_3BuildGainReg(u16 vp_Arfcn, u8 vp_Band, t_L1d_Level *pp_Level)
836
837 1 laforge
Calculate AGC register prior to Rx
838
839 5 laforge
840
h4. l1d0_4DeactivateRx(u16 vp_Start)
841
842 1 laforge
Deactivate Radio Rx power control paths
843
844 5 laforge
845
h4. l1d0_6RxWinCtrl(u16 vp_Arfcn, u8 vp_WinId, t_L1d_Level *pp_level, u8 vp_Fb26SpecialCase)
846
847 1 laforge
Program everything on Vega & LMX for TX path
848
849 5 laforge
850
h4. l1d0_7TxWinCtrl(u16 vp_Arfcn, u8 vp_WinId, u8 vp_TxPwr)
851
852 1 laforge
Programs everything on vega & LMX for TX path except power ramping
853
854 5 laforge
855
h4. l1d0_8ILToGain(u16 vp_Arfcn, u8 vp_Band, t_L1d_Level *pp_level)
856
857 1 laforge
Computes the various gains to be programmed in the LMX3411 RF chip according to the expected input level at the antenna
858
859 5 laforge
860
h4. l1d0_13ActivateRx (u16 vp_Start, u8 vp_Band)
861
862 1 laforge
Activate the Radio Rx path
863
864 5 laforge
865
h4. l1d0_15RfInit(void)
866
867 1 laforge
Initialization routine for RF
868
869 5 laforge
870
h4. l1d0_16ProgRfArfcn(u16 vp_Arfcn, u8 vp_TxRx, u8 vp_Band)
871
872 1 laforge
Program RF synthesizer N-Counter
873
874 5 laforge
875
h4. l1dmacro_reset_hw(u32 vp_ServingCellOffset)
876
877 1 laforge
Reset and set OFFSET register serving cell offset
878
879 5 laforge
880
h4. l1dmacro_init_hw(void)
881
882 1 laforge
Reset VEGA, then remove reset & Init RF synthesizers
883
884 5 laforge
885
h4. l1d_GenerateLMXRCountRegister(u8 vp_Band, u8 vp_TxRx)
886
887 1 laforge
Creates R counter register for LMX
888
889
890 5 laforge
h2. Data Structures
891
892
893
894
h3. l1s (Layer1/L1c/Inc/l1_defty.h:T_L1S_GLOBAL)
895
896 1 laforge
Global Layer1 Sync variables, such as
897 5 laforge
* L1S Task Management
898
* MFTAB management variables
899
* Control Parameters (TOA)
900
* TPU and DSP control registers
901
* Frame Number Management for serving cell (actual_time, next_time, next_plus_time)
902
* TX Power management
903
* RXqual mesurement
904 1 laforge
905 5 laforge
906
h3. l1a (Layer1/L1c/Inc/l1_defty.h:T_L1A_GLOBAL)
907
908 1 laforge
Global Layer1 Async variables, such as
909 5 laforge
* State for L1A machines (1 for each L1A_PROCESS)
910
* L1A Task management
911
* MEasurement task management
912 1 laforge
913 5 laforge
914
h3. l1a_l1s_com (T_L1A_L1S_COM)
915
916 1 laforge
Communication Structure from L1A into L1S
917 5 laforge
* serving cell identity / information
918
* parameters for idle mode
919
* parameters for CBCH
920
* random access information
921
* ADC management
922
* TXPWR management
923
* dedicated channel parameters (T_DEDIC_PARAM)
924
* neighbor cell information
925
* BA list / FULL list
926
* L1S task management
927
* measurement tasks management
928
* input level memory for AGC management
929 1 laforge
930 5 laforge
931
h3. l1s_dsp_com (T_L1S_DSP_COM)
932
933 1 laforge
Communication structure for L1S -> DSP communication
934 5 laforge
* active page for ARM writing to DSP
935
* active page for ARM reading from DSP
936
* pointers to dual-buffered (DB) and non-dual-buffered (NDB) MCU<->DSP pages
937 1 laforge
938 5 laforge
939
h4. T_DB_MCU_TO_DSP
940
941
* {downlink,uplink} task {command, burst identifier}
942
** d_task_d -- Downlink DSP task number
943
** d_burst_d -- Downlink burst identifier
944
** d_task_u -- Uplink DSP task number
945
** d_burst_u -- Uplink burst identifier
946
* d_task_md -- downlink monitoring (FB/SB) command
947
* d_background -- background tasks
948
* d_debug -- Debug/Acknowledge/general purpose word
949
* d_task_ra -- RA task command
950
* d_fn -- frane mumber in case of TCH
951
<pre>
952 1 laforge
//        bit [0..7]  -> b_fn_report, FN in the normalized reporting period.
953
//        bit [8..15] -> b_fn_sid,    FN % 104, used for SID positionning.
954 5 laforge
</pre>
955
* d_ctrl_tch -- TCH description
956
<pre>
957 1 laforge
//        bit [0..3]  -> b_chan_mode,    channel  mode.
958
//        bit [4..5]  -> b_chan_type,    channel type.
959 5 laforge
//        bit r6     -> reset SACCH.
960
//        bit r7     -> vocoder ON
961
//        bit r8     -> b_sync_tch_ul,  synchro. TCH/UL.
962
//        bit r9     -> b_sync_amr,
963
//        bit r10    -> b_stop_tch_ul,  stop TCH/UL.
964
//        bit r11    -> b_stop_tch_dl,  stop TCH/DL.
965 1 laforge
//        bit [12.14] -> b_tch_loop,     tch loops A/B/C.
966 5 laforge
//        bit r15    -> b_subchannel
967
</pre>
968
* d_ctrl_abb -- Bit field indicating teh analog baseband register to send
969
<pre>
970
//        bit r0     -> b_ramp: the ramp information(a_ramp[]) is located in NDB
971 1 laforge
//        bit [1.2]   -> unused
972 5 laforge
//        bit r3     -> b_apcdel: delays-register in NDB
973
//        bit r4     -> b_afc: freq control register in DB
974 1 laforge
//        bit [5..15] -> unused
975 5 laforge
</pre>
976
* da_a5fn -- encryption frame number
977
<pre>
978 1 laforge
//        word 0, bit [0..4]  -> T2.
979
//        word 0, bit [5..10] -> T3.
980
//        word 1, bit [0..11] -> T1.
981 5 laforge
</pre>
982
* d_power_ctl -- power level control (L1D_AUXAPC|n)
983
* d_afc -- AFC value (enabled by b_afc in d_ctrl_abb)
984
* d_ctrl_system -- Control Register for RESET/RESUME
985
<pre>
986 1 laforge
//        bit [0..2] -> b_tsq,           training sequence.
987 5 laforge
//        bit r3    -> b_bcch_freq_ind, BCCH frequency indication.
988
//        bit r15   -> b_task_abort,    DSP task abort command.
989
</pre>
990 1 laforge
991
992 5 laforge
h4. T_DB_DSP_TO_MCU
993
994
* {downlink,uplink} task {command, burst identifier}
995
** d_task_d
996
** d_burst_d
997
** d_task_u
998
** d_burst_u
999
* d_task_md -- downlink monitoring (FB/SB) command
1000
** number of cells to monitor
1001
* d_background -- background tasks
1002
* d_task_ra -- RA task command
1003
* a_serv_Demod -- Serv. cell demod. result, array of 4 words (TOA,PM,ANGLE,SNR)
1004
* a_pm -- Power measurement results, array of 3 words
1005
* a_sch -- Header + SB information, array of 5 words
1006
1007
1008
h4. T_NDB_MCU_DSP
1009
1010
* d_dsp_page
1011
<pre>
1012
// bitr0       -> B_GSM_PAGE: which of the two double-buffered pages is current
1013
// bitr1       -> B_GSM_TASK: is the GSM TASK active?
1014
// bitr2       -> B_MISC_PAGE: which of the two misc pages is current
1015
// bitr3       -> B_MISC_TASK: are MISC tasks active?
1016
</pre>
1017
* d_error_status -- DSP status returned (DSP->MCU)
1018
* d_spcx_rif -- RIF control (MCU->DSP), always set to 0x179
1019
* d_tch_mode -- TCH mode register
1020
<pre>
1021 1 laforge
// bit [0..1]  -> b_dai_mode.
1022 5 laforge
// bit r2     -> b_dtx.
1023
// bitr3      -> play_ul when set to 1
1024
// bitr4      -> play_dl when set to 1
1025
// bitr5      -> DTX selection for voice memo
1026
// bitr6      -> Reserved for ciphering debug
1027 1 laforge
// bit[7..10]  -> Reserved for ramp up control
1028 5 laforge
// bitr11     -> Reserved for analog device selection
1029
</pre>
1030
* d_debug1 -- bit 0 at 1 enable dsp f_tx delay of 400000 cyc DEBUG
1031
* d_dsp_test
1032
* API version number information
1033
** d_version_number1 -- code version number
1034
** d_version_number2 -- patch version number
1035
* debug buffer for tracing
1036
** p_debug_buffer
1037
** d_debug_buffer_size
1038
** d_debug_trace_type
1039
* d_dsp_state -- DSP report its stata: 0 run, 1 Idle1, 2 Idle2, 3 Idle3
1040
* p_debug_amr -- AMR debugging
1041
* d_mcsi_select -- Related to the MCSI bus interface
1042
* New words APCDEL1 and APCDEL2 for 2TX: TX/PRACH combinations
1043
** d_apcdel1_bis
1044
** d_apcdel2_bis
1045
* New registres due to IOTA ABB
1046
** d_apcdel2 -- copied from l1config.params.apcdel2
1047
** d_vbctrl2
1048
** d_bulgcal -- Calibration value copied from l1_config.params.bulgcal
1049
* Analog Base Band
1050
** d_afcctladd  -- Copied form l1_config.params.afcctladd
1051
** d_vbuctrl -- Voice Uplink Control?
1052
** d_vbdctrl -- Voice Downlink Control?
1053
** d_apcdel1 -- APC?
1054
** d_apcoff -- APC?
1055
** d_bulioff -- Copied from l1_config.params.bulioff
1056
** d_bulqoff -- Copied from l1_config.params.bulqoff
1057
** d_dai_onoff -- Copied from l1_config.params.dai_onoff
1058
** d_auxdac --
1059
** d_bbctrl
1060
* results of monitoring tasks (FB + SB) DSP->MCU
1061
** d_fb_det -- FB detection result (1 for FOUND)
1062
** d_fb_mode -- Mode for FB detection algorithm
1063
*** FB_MODE_0 -- wideband search for FB detection
1064
*** FB_MODE_1
1065
** a_async_demodr4 -- FB/SB demod. result (TOA,PM,ANGLE,SNR)
1066
* audio gain for upolink and downlink
1067
** d_audio_gain_ul
1068
** d_audio_gain_dl
1069
* audio playback related data
1070
** d_audio_compressor_ctrl
1071
** d_audio_init
1072
** d_audio_status
1073
** Tones (MCU -> DSP)
1074
*** d_toneskb_init
1075
*** d_toneskb_status
1076
*** d_k_x1_t0
1077
*** d_k_x1_t1
1078
*** d_k_x1_t2
1079
*** d_pe_rep
1080
*** d_pe_off
1081
*** d_se_off
1082
*** d_bu_off
1083
*** d_t0_on
1084
*** d_t0_off
1085
*** d_t1_on
1086
*** d_t1_off
1087
*** d_t2_on
1088
*** d_t2_off
1089
*** d_k_x1_kt0
1090
*** d_k_x1_kt1
1091
*** d_dur_kb
1092
*** d_shiftdl
1093
*** d_shiftul
1094
*** d_aec_ctrl
1095
*** d_es_level_api
1096
*** d_mu_api
1097
* melody ringer module
1098
** d_melo_osc_used
1099
** d_melo_osc_active
1100
** a_melo_route0 ... a_melo_route7
1101
** d_melody_selection -- selection of melody format
1102
* speech recognition related data
1103
** d_sr_status
1104
** d_sr_param -- parameters for the DSP speech recognition task: OOV threshold
1105
** d_sr_bit_exact_test
1106
** d_sr_nb_words -- number of words used in the speech recognition task
1107
** d_sr_db_level -- Estimate voice level in dB
1108
** d_sr_db_noise -- Estimate noise in dB
1109
** a_n_best_words -- Array of the 4 best words
1110
** a_n_best_score -- Array of the 4 best scores (32bit for each score)
1111
* audio buffer
1112
** a_dd_1r22
1113
** a_du_1r22
1114
* v42bis module
1115
** d_v42b_nego0
1116
** d_v42b_nego1
1117
** d_v42b_control
1118
** d_v42b_ratio_ind
1119
** d_mcu_control
1120
** d_mcu_control_sema
1121
* background tasks
1122
** d_background_enable
1123
*** B_DSPBGD_RECO -- background recognition task code
1124
*** C_BGD_RECOGN
1125
*** B_DSPBGD_UPD -- start of alignment update in dsp background
1126
*** C_BGD_ALIGN
1127
** d_background_abort
1128
** d_background_state
1129
** d_max_background
1130
** a_background_tasksr16
1131
** a_back_task_ior16
1132
* GPRS/GEA ciphering info
1133
** d_gea_mode_ovly
1134
** a_gea_kc_ovlyr4
1135
* d_thr_usf_detect -- word used for the init of USF threshold
1136
* d_a5mode -- A5 encryption mode
1137
* d_sched_mode_grps_ovly
1138
* a_rampr16 -- power ramp information
1139
* actual data inside logical channels
1140
** a_cdr15 -- CCCH/SACCH downlink information
1141
** a_fdr15 -- FACCH downlink information
1142
** a_dd_0r22 -- traffic downlink data frames
1143
** a_cur15 -- CCCH/SACCH uplink information
1144
** a_fur15 -- FACCH upilink information
1145
** a_du_0r22 -- TCH upilink data frames
1146
** d_rach -- RACH information (MCU -> DSP)
1147
** a_kcr4 -- Kc (MCU->DSP)
1148
* integrated data services module
1149
* speech recognition model
1150
* EOTD related data
1151
* AMR v1.0 buffers
1152
** a_amr_configr4
1153
** a_ratscch_ulr6
1154
** a_ratscch_dlr6
1155
** d_amr_snr_est -- estimation of the SNR of the AMR speech block
1156
** detection thresholds
1157 1 laforge
1158
1159 5 laforge
h4. T_PARAM_MCU_DSP
1160
1161
1162 1 laforge
All parameters are initialized at dsp_power_on() time form a static array.
1163
1164 5 laforge
* d_transfer_rate
1165
* GPRS related latencies
1166
** d_lat_mcu_bridge
1167
** d_lat_mcu_hom2sam
1168
** d_lat_mcu_bef_fast_access
1169
** d_lat_dsp_after_sam
1170
* d_grps_install_address (dsp start address)
1171
* d_misc_config
1172
* d_cn_sw_workaround
1173
* d_fb_margin_beg
1174
* Frequency Correction Burst (FB)
1175
** d_fb_margin_beg
1176
** d_fb_margin_end
1177
** d_nsubb_idle
1178
** d_nsubb_dedic
1179
** d_fb_thr_det_iacq
1180
** d_fb_thr_det_track
1181
* Demodulation
1182
** d_dc_off_thres
1183
** d_dummy_thres
1184
** d_dem_pond_gewl
1185
** d_dem_pond_red
1186
* TCH/F V1 Full-Rate Speech
1187
** d_maccthresh1
1188
** d_mldt
1189
** d_maccthresh
1190
** d_gu
1191
** d_go
1192
** d_attmax
1193
** d_sm
1194
** d_b
1195
* V42bis related data
1196
* TCH/H V1 Half-Rate
1197
** d_ldT_hr
1198
** d_maccthresh_hr
1199
** d_maccthresh1_hr
1200
** d_gu_hr
1201
** d_go_hr
1202
** d_sm_hr
1203
** d_attmax_hr
1204
* TCH/F V2 EFR
1205
** c_mldt_efr
1206
** c_maccthresh_efr
1207
** c_maccthresh1_efr
1208
** c_gu_efr
1209
** c_go_efr
1210
** c_b_efr
1211
** c_sm_efr
1212
** c_attmax_efr
1213
* CHED
1214
* FACCH module
1215
** d_facch_thr
1216
* IDS module
1217
* FIR coefficients
1218
** a_fir31_uplinkr31;
1219
** a_fir32_downlinkr31;
1220 1 laforge
1221 5 laforge
1222
h3. l1s_tpu_com (T_L1S_TPU_COM)
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