TSM30Layer1 » History » Version 1
laforge, 02/19/2016 10:49 PM
notes and documentation on the TSM30 Layer1 (on calypso DBB)
1 | 1 | laforge | == General Terminlogy == |
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2 | |||
3 | * L1 sync -- The synchronous side of the Layer 1, triggered by the TDMA frame interrupt issued by the DSP |
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4 | * L1 async -- The asynchronous side of the Layer 1, driven by the L2/L3 |
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5 | |||
6 | == Files == |
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7 | |||
8 | === Layer1/L1i/Src/dl1_mem.c === |
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9 | |||
10 | allocating/receiving/sending signals. |
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11 | |||
12 | === Layer1/L1i/Src/dl1_pei.c === |
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13 | |||
14 | create/initialise/close protocol stack entity |
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15 | |||
16 | === Layer1/L1c/Src/l1_afunc.c === |
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17 | |||
18 | Functionality related bit and timeslot synchronization |
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19 | |||
20 | === Layer1/L1c/Inc/l1_defty.h === |
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21 | |||
22 | DSP shared memory API definitions |
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23 | |||
24 | === Layer1/L1c/Src/l1_sync.c === |
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25 | |||
26 | Code driven by TDMA frame interrupt as issued by DSP |
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27 | |||
28 | |||
29 | == Functions == |
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30 | |||
31 | === Frame/Src/Frame.c:pf_ProcessSystemPrim(USHORT TaskHandle, T_VOID_STRUCT *pPrim) === |
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32 | |||
33 | called from Frame/Src/vsi_com.c:vsi_c_primitive(), in turn from Layer1/L1i/Src/dl1_mem.c:os_receive_sig(UWORD8 queue) |
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34 | whenever the Layer1 receives a Signal. |
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35 | |||
36 | === Layer1/L1i/Src/dl1_pei.c:pei_run(T_VSI_CHANDLE handle) === |
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37 | |||
38 | process primitives, called by main loop in the protocol stack entity |
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39 | |||
40 | === Layer1/L1c/Src/l1_async.c:l1a_task() === |
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41 | |||
42 | {{{ |
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43 | /* L1A (Layer 1 Asynchronous) task function. This */ |
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44 | /* function manages the interface between L3 and L1. It */ |
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45 | /* is composed with a set of state machine, each machine */ |
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46 | /* handles a particular GSM functionality. When a */ |
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47 | /* message is received in L1_C1 message queue, it is */ |
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48 | /* submitted to every state machine. The one which are */ |
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49 | /* impacted by the message process it. At the end of */ |
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50 | /* "l1a_task()" function, a balance routine is called, */ |
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51 | /* it enables L1S tasks consequently to the state machine*/ |
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52 | /* requests. */ |
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53 | }}} |
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54 | |||
55 | * iterates over list of primitives, call l1pa_task() |
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56 | |||
57 | === Layer1/L1c/Src/l1p_asyn.c:l1pa_task(xSignalHeaderRec *msg) === |
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58 | |||
59 | call into the various lapa_*_process() functions for GPRS |
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60 | |||
61 | === layer1 asynchronous === |
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62 | |||
63 | ==== l1a_test_process() ==== |
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64 | |||
65 | Hardware test |
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66 | |||
67 | ==== l1a_stats_process() ==== |
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68 | |||
69 | Statistics or Test process |
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70 | |||
71 | ==== l1a_mmi_adc_req() ==== |
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72 | |||
73 | ADC conversion |
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74 | |||
75 | ==== l1a_freq_band_configuration() ==== |
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76 | Frequency Band configuration: GSM900, E-GSM900, DCS1800, DUAL, DUALEXT, PCS 1900 |
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77 | {{{ |
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78 | /* Description : This state machine handles the frequency*/ |
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79 | /*band configuration: E_GSM900, GSM900, DCS1800, PCS1900,*/ |
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80 | /*DUAL, DUALEXT, DUALEXT_PCS1900... */ |
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81 | /* */ |
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82 | /* Starting messages: MPHC_INIT_L1_REQ */ |
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83 | /* */ |
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84 | /* Result messages (input): none */ |
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85 | /* Result messages (output): MPHC_INIT_L1_CON */ |
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86 | /* Reset messages (input): none */ |
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87 | }}} |
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88 | |||
89 | ==== l1a_initial_network_sync_process() ==== |
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90 | |||
91 | Synchronization with a Neighbour cell for Cell Selection |
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92 | {{{ |
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93 | /* Description : This state machine handles the 1st */ |
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94 | /* synchronization with the network. */ |
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95 | /* */ |
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96 | /* Starting messages: MPHC_NETWORK_SYNC_REQ */ |
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97 | /* */ |
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98 | /* Result messages (input): L1C_FB_INFO */ |
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99 | /* L1C_SB_INFO */ |
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100 | /* */ |
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101 | /* Result messages (output): MPHC_NETWORK_SYNC_IND */ |
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102 | /* */ |
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103 | /* Reset messages (input): MPHC_STOP_NETWORK_SYNC_REQ */ |
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104 | /* (MPHC_STOP_NETWORK_SYNC_CON) */ |
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105 | }}} |
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106 | |||
107 | ==== l1a_network_lost() ==== |
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108 | |||
109 | lost Network |
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110 | |||
111 | ==== l1a_full_list_meas_process() ==== |
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112 | |||
113 | Full list receive level monitoring |
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114 | {{{ |
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115 | /* Description: */ |
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116 | /* ------------ */ |
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117 | /* This function is a state machine which handles the */ |
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118 | /* Cell Selection Full List Power Measurement L1/L3 */ |
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119 | /* interface and it handles the neigbour cell */ |
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120 | /* measurement process in IDLE mode with FULL list. */ |
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121 | /* When a message MPHC_RXLEV_REQ is received */ |
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122 | /* the L1S task FSMS_MEAS is enabled. When this task */ |
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123 | /* is completed a reporting message L1C_VALID_MEAS_INFO */ |
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124 | /* is received and forwarded to L3. */ |
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125 | /* */ |
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126 | /* Starting messages: MPHC_RXLEV_REQ. */ |
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127 | /* */ |
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128 | /* Result messages (input): L1C_VALID_MEAS_INFO */ |
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129 | /* */ |
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130 | /* Result messages (output): MPHC_RXLEV_IND */ |
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131 | /* */ |
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132 | /* Reset messages (input): none */ |
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133 | /* */ |
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134 | /* Stop message (input): MPHC_STOP_RXLEV_REQ */ |
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135 | /* */ |
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136 | /* Stop message (output): MPHC_STOP_RXLEV_CON */ |
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137 | /* */ |
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138 | /* Rem: */ |
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139 | /* ---- */ |
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140 | /* L3 is in charge of the number of pass to follow the */ |
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141 | /* GSM recommendation. */ |
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142 | }}} |
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143 | |||
144 | ==== l1a_idle_ba_list_meas_process() ==== |
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145 | {{{ |
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146 | /* Description : This state machine handles neigbor cell */ |
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147 | /* measurement process in IDLE mode with BA list. */ |
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148 | /* */ |
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149 | /* Starting messages: MPHC_RXLEV_PERIODIC_REQ */ |
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150 | /* ------------------ */ |
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151 | /* L1 starts then the periodic BA list receive level */ |
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152 | /* monitoring. */ |
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153 | /* */ |
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154 | /* Subsequent messages: MPHC_RXLEV_PERIODIC_REQ */ |
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155 | /* -------------------- */ |
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156 | /* L1 changes the BA list and starts the periodic BA */ |
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157 | /* list receive level monitoring with this new list. */ |
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158 | /* */ |
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159 | /* Result messages (input): L1C_RXLEV_PERIODIC_DONE */ |
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160 | /* ------------------------ */ |
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161 | /* This is the periodic reporting message from L1s. */ |
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162 | /* */ |
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163 | /* Result messages (output): MPHC_RXLEV_PERIODIC_IND */ |
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164 | /* ------------------------- */ |
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165 | /* This is the periodic reporting message to L3. */ |
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166 | /* */ |
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167 | /* Reset messages (input): MPHC_STOP_RXLEV_PERIODIC_REQ*/ |
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168 | /* ----------------------- */ |
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169 | /* BA list neigbor cell measurement process in IDLE */ |
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170 | /* is stopped by this message. */ |
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171 | }}} |
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172 | |||
173 | ==== l1a_idle_6strongest_monitoring_process() ==== |
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174 | |||
175 | 6 strongest Neighbor cells synchro. monitoring |
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176 | {{{ |
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177 | /* Description: */ |
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178 | /* ------------ */ |
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179 | /* This function is a state machine which handles the */ |
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180 | /* synchronization with up to 6 neighbor cells */ |
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181 | /* */ |
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182 | /* Starting messages: MPHC_NCELL_SYNC_REQ */ |
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183 | /* ------------------ MPHC_NCELL_LIST_SYNC_REQ */ |
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184 | /* L1 makes an attempt to read the FB/SB or to confirm */ |
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185 | /* SB. */ |
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186 | /* */ |
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187 | /* */ |
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188 | /* Result messages (input): L1C_FB_INFO */ |
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189 | /* ------------------------ L1C_SB_INFO */ |
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190 | /* L1C_SBCONF_INFO */ |
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191 | /* Result messages from L1S. FB detection, SB detection,*/ |
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192 | /* SB confirmation. */ |
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193 | /* */ |
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194 | /* Result messages (output): MPHC_NCELL_SYNC_IND */ |
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195 | /* ------------------------- */ |
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196 | /* SB indication. */ |
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197 | /* */ |
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198 | /* Reset messages (input): MPHC_STOP_NCELL_SYNC_REQ */ |
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199 | /* ----------------------- (MPHC_STOP_NCELL_SYNC_CON) */ |
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200 | }}} |
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201 | |||
202 | ==== l1a_neighbour_cell_bcch_reading_process() ==== |
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203 | |||
204 | 6 strongest Neighbor cells BCCH reading |
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205 | {{{ |
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206 | /* Description: */ |
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207 | /* ------------ */ |
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208 | /* This function is a state machine which handles the */ |
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209 | /* BCCH reading from up to 6 neighbour cells */ |
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210 | /* */ |
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211 | /* Starting messages: MPHC_NCELL_BCCH_REQ */ |
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212 | /* ------------------ */ |
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213 | /* */ |
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214 | /* Result messages (input): L1C_BCCHN_INFO */ |
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215 | /* ------------------------ */ |
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216 | /* */ |
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217 | /* Result messages (output): MPHC_NCELL_BCCH_IND */ |
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218 | /* ------------------------- */ |
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219 | /* */ |
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220 | /* Reset messages (input): MPHC_STOP_NCELL_BCCH_REQ */ |
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221 | /* ----------------------- (MPHC_STOP_NCELL_BCCH_CON) */ |
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222 | }}} |
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223 | |||
224 | ==== l1a_idle_serving_cell_bcch_reading_process() ==== |
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225 | |||
226 | Serving Cell BCCH reading |
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227 | {{{ |
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228 | /* Starting messages: MPHC_SCELL_NBCCH_REQ */ |
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229 | /* ------------------ MPHC_SCELL_EBCCH_REQ */ |
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230 | /* */ |
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231 | /* L1 continuously reads the serving cell BCCH and/or */ |
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232 | /* Extended BCCH as requested by the scheduling info. */ |
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233 | /* */ |
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234 | /* Result messages (input): L1C_BCCHS_INFO */ |
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235 | /* ------------------------ */ |
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236 | /* System information data block from L1S. */ |
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237 | /* */ |
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238 | /* Reset messages (input): MPHC_STOP_SCELL_BCCH_REQ */ |
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239 | /* ----------------------- (MPHC_STOP_SCELL_BCCH_CON) */ |
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240 | }}} |
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241 | |||
242 | ==== l1a_idle_serving_cell_paging_process() ==== |
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243 | |||
244 | Serving Cell PAGING reading |
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245 | {{{ |
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246 | /* Description : This state machine handles paging */ |
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247 | /* */ |
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248 | /* Starting messages: MPHC_START_CCCH_REQ */ |
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249 | /* ------------------ */ |
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250 | /* */ |
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251 | /* L1 continuously reads the serving cell BCCH and/or */ |
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252 | /* Extended BCCH as requested by the scheduling info. */ |
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253 | /* */ |
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254 | /* Result messages (input): L1C_ALLC_INFO */ |
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255 | /* ------------------------ L1C_NP_INFO */ |
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256 | /* L1C_EP_INFO */ |
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257 | /* */ |
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258 | /* Reset messages (input): MPHC_STOP_CCCH_REQ */ |
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259 | /* ----------------------- (MPHC_STOP_CCCH_CON) */ |
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260 | }}} |
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261 | |||
262 | ==== l1a_idle_smscb_process() ==== |
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263 | |||
264 | Short Message Servive Cell Broadcast reading |
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265 | {{{ |
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266 | /* Description : This state machine handles the SMSCB */ |
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267 | /* (Short Message Service Cell Broadcast). */ |
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268 | /* */ |
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269 | /* Starting messages: MPHC_CONFIG_CBCH_REQ */ |
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270 | /* */ |
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271 | /* Subsequent messages: MPHC_CBCH_SCHEDULE_REQ */ |
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272 | /* MPHC_CBCH_INFO_REQ */ |
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273 | /* MPHC_CBCH_UPDATE_REQ */ |
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274 | /* */ |
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275 | /* Result messages (input): L1C_CB_INFO */ |
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276 | /* */ |
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277 | /* Result messages (output): MPHC_DATA_IND */ |
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278 | /* */ |
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279 | /* Reset messages (input): MPHC_STOP_CBCH_REQ */ |
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280 | /* */ |
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281 | }}} |
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282 | |||
283 | ==== l1a_cres_process() ==== |
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284 | |||
285 | Cell reselection process |
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286 | |||
287 | Synchronization and requested BCCH reading --> camp on new cell |
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288 | |||
289 | {{{ |
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290 | /* Description: */ |
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291 | /* ------------ */ |
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292 | /* This function is a state machine which handles Cell */ |
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293 | /* Reselection. */ |
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294 | /* */ |
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295 | /* Starting messages: MPHC_NEW_SCELL_REQ */ |
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296 | /* ------------------ */ |
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297 | /* L1 camps on the given ARFCN. */ |
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298 | /* */ |
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299 | /* Result messages (output): MPHC_NEW_SCELL_CON */ |
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300 | }}} |
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301 | |||
302 | ==== l1a_access_process() ==== |
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303 | |||
304 | Link Access Process. |
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305 | {{{ |
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306 | /* Description : This state machine handles the access */ |
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307 | /* to the network while in IDLE mode. */ |
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308 | /* */ |
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309 | /* Starting messages: MPHC_RA_REQ */ |
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310 | /* */ |
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311 | /* Subsequent messages: MPHC_RA_REQ */ |
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312 | /* */ |
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313 | /* Result messages (input): L1C_RA_DONE */ |
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314 | /* */ |
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315 | /* Result messages (output): MPHC_RA_CON */ |
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316 | /* */ |
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317 | /* Reset message (input): MPHC_STOP_RA_REQ */ |
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318 | /* */ |
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319 | /* Reset message (input): MPHC_STOP_RA_CON */ |
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320 | }}} |
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321 | |||
322 | ==== l1a_dedicated_process() ==== |
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323 | |||
324 | Dedicated mode process |
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325 | {{{ |
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326 | /* Description : This state machine handles the dedicated*/ |
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327 | /* mode setup (L1A side). */ |
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328 | /* */ |
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329 | /* Starting messages: MPHC_IMMED_ASSIGN_REQ */ |
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330 | /* */ |
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331 | /* Subsequent messages: MPHC_CHANNEL_ASSIGN_REQ */ |
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332 | /* MPHC_SYNC_HO_REQ */ |
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333 | /* MPHC_PRE_SYNC_HO_REQ */ |
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334 | /* MPHC_PSEUDO_SYNC_HO_REQ */ |
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335 | /* MPHC_ASYNC_HO_REQ */ |
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336 | /* MPHC_ASYNC_HO_COMPLETE */ |
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337 | /* MPHC_HANDOVER_FAIL_REQ */ |
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338 | /* MPHC_CHANGE_FREQUENCY */ |
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339 | /* OML1_CLOSE_TCH_LOOP_REQ */ |
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340 | /* OML1_OPEN_TCH_LOOP_REQ */ |
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341 | /* OML1_START_DAI_TEST_REQ */ |
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342 | /* OML1_STOP_DAI_TEST_REQ */ |
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343 | /* */ |
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344 | /* Result messages (input): L1C_DEDIC_DONE */ |
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345 | /* L1C_SACCH_INFO */ |
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346 | /* */ |
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347 | /* Result messages (output): MPHC_CHANNEL_ASSIGN_CON */ |
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348 | /* MPHC_SYNC_HO_CON */ |
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349 | /* MPHC_PRE_SYNC_HO_CON */ |
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350 | /* MPHC_PSEUDO_SYNC_HO_CON */ |
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351 | /* MPHC_ASYNC_HO_CON */ |
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352 | /* MPHC_TA_FAIL_IND */ |
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353 | /* MPHC_DATA_IND */ |
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354 | /* OML1_CLOSE_TCH_LOOP_CON */ |
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355 | /* OML1_OPEN_TCH_LOOP_CON */ |
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356 | /* OML1_START_DAI_TEST_CON */ |
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357 | /* OML1_STOP_DAI_TEST_CON */ |
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358 | /* */ |
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359 | /* Reset messages (input): MPHC_CHANNEL_RELEASE */ |
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360 | }}} |
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361 | |||
362 | ==== l1a_dedic6_process ==== |
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363 | |||
364 | 6 strongest Neighbor cells synchro. monitoring and BCCH reading |
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365 | {{{ |
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366 | /* Description : This state machine handles the 6 strong.*/ |
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367 | /* neighbor cells management in dedicated mode. */ |
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368 | /* */ |
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369 | /* Remark: in dedicated mode there is no reason to use */ |
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370 | /* the task parameters semaphores since there is no */ |
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371 | /* ambiguity and no asynchronous/synchronous conflict to */ |
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372 | /* care about. */ |
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373 | /* */ |
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374 | /* Starting messages: L1C_DEDIC_DONE */ |
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375 | /* */ |
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376 | /* Result messages (input): L1C_FB_INFO */ |
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377 | /* L1C_SB_INFO */ |
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378 | /* L1C_SBCONF_INFO */ |
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379 | /* */ |
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380 | /* Reset messages (input): MPHC_CHANNEL_RELEASE */ |
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381 | }}} |
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382 | |||
383 | === layer 1 synchronous === |
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384 | |||
385 | ==== Layer1/L1c/Src/l1_sync.c:hisr() ==== |
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386 | |||
387 | Interrupt Service Routine called by the DSP TDMA frame interrupt |
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388 | * Calls l1s_synch() |
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389 | |||
390 | ==== Layer1/L1c/Src/l1_sync.c:l1s_synch() ==== |
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391 | {{{ |
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392 | /* This function is the core of L1S. Here is a summary */ |
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393 | /* of the execution: */ |
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394 | /* */ |
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395 | /* - Frame counters management. */ |
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396 | /* - Get current communication page pointers. */ |
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397 | /* - RESET internal variables. */ |
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398 | /* - RESET MCU->DSP DB communication page. */ |
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399 | /* - TOA update management. */ |
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400 | /* */ |
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401 | /* - L1 task manager, */ |
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402 | /* - Dedicated_mode_manager. */ |
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403 | /* - Task_scheduler. */ |
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404 | /* - Execute_frame. */ |
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405 | /* - Neighbor cells measurement manager. */ |
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406 | /* - End manager. */ |
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407 | }}} |
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408 | |||
409 | ==== l1s_dedicated_mode_manager() ==== |
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410 | |||
411 | * assignment of a new channel, changing channel mode, ciphering start, etc. |
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412 | |||
413 | ==== l1s_task_scheduler_process() ==== |
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414 | {{{ |
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415 | /* This function is the task scheduler of L1S. It */ |
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416 | /* schedules any enabled task. When a task must start, */ |
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417 | /* it becomes PENDING. Since several tasks can become */ |
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418 | /* pending at the same time, the highest priority one */ |
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419 | /* is elected. The elected task compete then with the */ |
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420 | /* current running task. If they conflict, the highest */ |
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421 | /* priority one wins. If the winning is the new comer */ |
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422 | /* then the multiframe table is reset and the new coming */ |
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423 | /* task is installed. */ |
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424 | }}} |
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425 | |||
426 | ==== l1s_execute_frame() ==== |
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427 | * call l1s_exec_mftab() |
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428 | |||
429 | ==== Layer1/L1c/Src/l1_mfmgr.c:l1s_exec_mftab() ==== |
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430 | * Execute functions from MFTAB |
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431 | FIXME |
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432 | |||
433 | ==== l1s_meas_manager() ==== |
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434 | {{{ |
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435 | /* Description: */ |
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436 | /* ------------ */ |
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437 | /* This function is the measurement tasks manager. */ |
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438 | /* The followings tasks are handled: */ |
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439 | /* */ |
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440 | /* FSMS_MEAS: */ |
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441 | /* 1) Full list measurement in Cell Selection */ |
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442 | /* The machine performs 1 valid measurement per carrier */ |
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443 | /* from the full list of GSM carriers. To achieve 1 */ |
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444 | /* valid measurement, 2 attempt with 2 different AGC */ |
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445 | /* are performed worst case. When all carriers are */ |
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446 | /* a reporting message L1C_VALID_MEAS_INFO is built and */ |
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447 | /* sent to L1A. */ |
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448 | /* */ |
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449 | /* 2) Full list measurement in Idle mode. */ |
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450 | /* The machine performs 1 valid measurement per carrier */ |
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451 | /* from the full list of GSM carriers. To achieve 1 */ |
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452 | /* valid measurement, 2 attempt with 2 different AGC */ |
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453 | /* are performed worst case. When all carriers are */ |
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454 | /* a reporting message L1C_VALID_MEAS_INFO is built and */ |
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455 | /* sent to L1A. */ |
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456 | /* */ |
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457 | /* I_BAMS_MEAS: BA list measurement in Idle mode. */ |
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458 | /* The machine performs 7 measurements per PCH reading */ |
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459 | /* (3*2+1) looping on the BA list. When 7 measurements are */ |
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460 | /* completed (end of PCH) a reporting message */ |
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461 | /* L1C_RXLEV_PERIODIC_DONE is built and sent to L1A. */ |
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462 | }}} |
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463 | |||
464 | ==== l1s_end_manager() ==== |
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465 | * copy page into real time trace buffer |
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466 | |||
467 | ==== l1s_increment_time() ==== |
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468 | * Increament the various framenumbers by one |
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469 | |||
470 | |||
471 | |||
472 | |||
473 | === DSP Tasks === |
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474 | {{{ |
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475 | #define HWTEST 0 // DSP checksum reading |
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476 | #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode |
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477 | #define DEDIC 2 // Global Dedicated mode switch |
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478 | #define RAACC 3 // Channel access (ul) |
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479 | #define RAHO 4 // Handover access (ul) |
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480 | #define NSYNC 5 // Global Neighbour cell synchro switch |
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481 | #define POLL 6 // Packet Polling (Access) |
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482 | #define PRACH 7 // Packet Random Access Channel |
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483 | #define ITMEAS 8 // Interference measurements |
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484 | #define FBNEW 9 // Frequency burst search (Idle mode) |
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485 | #define SBCONF 10 // Synchro. burst confirmation |
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486 | #define SB2 11 // Synchro. burst read (1 frame uncertainty / SB position) |
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487 | //#define PTCCH 12 // Packet Timing Advance control channel CCR 9-12-02 BUG02527 |
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488 | #define FB26 12 // Frequency burst search, dedic/transfer mode MF26 or MF52 |
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489 | #define SB26 13 // Synchro burst search, dedic/transfer mode MF26 or MF52 |
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490 | #define SBCNF26 14 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52 |
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491 | #define FB51 15 // Frequency burst search, dedic mode MF51 |
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492 | #define SB51 16 // Synchro burst search, dedic MF51 |
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493 | #define SBCNF51 17 // Synchro burst confirmation, dedic MF51 |
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494 | #define PDTCH 18 // Packet Data channel |
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495 | #define BCCHN 19 // BCCH Neighbor in GSM Idle |
||
496 | #define ALLC 20 // All CCCH Reading |
||
497 | #define EBCCHS 21 // Extended BCCH Serving Reading |
||
498 | #define NBCCHS 22 // Normal BCCH Serving Reading |
||
499 | #define SMSCB 23 // CBCH serving Reading |
||
500 | #define ADL 24 // SACCH(SDCCH) DL |
||
501 | #define AUL 25 // SACCH(SDCCH) UL |
||
502 | #define DDL 26 // SDCCH DL |
||
503 | #define DUL 27 // SDCCH UL |
||
504 | #define TCHD 28 // Dummy for TCH Half rate |
||
505 | #define TCHA 29 // SACCH(TCH) |
||
506 | #define TCHTF 30 // TCH Full rate |
||
507 | #define TCHTH 31 // TCH Half rate |
||
508 | #define PALLC 32 // All PCCCH reading |
||
509 | #define PSMSCB 33 // CBCH serving Reading while in Packet Idle |
||
510 | #define PBCCHS 34 // PBCCH serving reading |
||
511 | #define PNP 35 // Packet Normal paging Reading |
||
512 | #define PEP 36 // Packet Extended paging Reading |
||
513 | #define SINGLE 37 // Single Block for GPRS |
||
514 | #define PBCCHN_TRAN 38 // Packet BCCH Neighbor in Packet Transfer mode. |
||
515 | #define PBCCHN_IDLE 39 // Packet BCCH Neighbor in Idle mode. |
||
516 | #define BCCHN_TRAN 40 // BCCH Neighbour in Packet Transfer mode |
||
517 | #define NP 41 // Normal paging Reading |
||
518 | #define EP 42 // Extended paging Reading |
||
519 | #define BCCHN_TOP 43 // BCCH Neighbour TOP priority in Idle mode |
||
520 | #define PTCCH 44 // Packet Timing Advance control channel |
||
521 | #define SYNCHRO 45 // synchro task: L1S reset |
||
522 | #define PTS_START_TX_BURST_TEST 46 // PTS transmission test |
||
523 | #define PTS_START_RX_BURST_TEST 47 // PTS receive test |
||
524 | #define PTS_START_FB_BURST_TEST 48 // PTS frequency burst receive test |
||
525 | #define PTS_START_FB26_BURST_TEST 49 // PTS frequency burst receive test |
||
526 | #define PTS_START_SB26_BURST_TEST 50 // PTS frequency burst receive test |
||
527 | }}} |
||
528 | |||
529 | === DSP Driver (l1_drive.c) === |
||
530 | |||
531 | ==== l1ddsp_load_monit_task(API monit_task, fb_mode) ==== |
||
532 | |||
533 | * monit_taks = number of measurements (max 8) + sometimes 0x200 |
||
534 | * set FB detection algorithm |
||
535 | |||
536 | ==== l1ddsp_load_txpwr(u8 vp_TxPower, u16 vp_Arfcn) ==== |
||
537 | |||
538 | ==== l1ddsp_load_rx_task(API rx_task, UWORD8 burst_id, UWORD8 tsq) ==== |
||
539 | |||
540 | Load values into l1s_dsp_com.dsp_db_w_ptr: |
||
541 | * d_task_d = rx_task |
||
542 | * d_burst_d = burst_id |
||
543 | * d_ctrl_system |= tsq << B_TSQ |
||
544 | |||
545 | ==== l1ddsp_load_ra_task(API ra_task) ==== |
||
546 | * d_task_ra = ra_task |
||
547 | |||
548 | ==== l1ddsp_load_tch_mode(UWORD8 dai_mode, BOOL dtx_allowed) ==== |
||
549 | |||
550 | ==== l1ddsp_load_tch_param() ==== |
||
551 | |||
552 | ==== l1ddsp_load_ciph_param(UWORD8 a5mode, T_ENCRYPTION_KEY *ciph_key) ==== |
||
553 | Set |
||
554 | * l1s_dsp_com.dsp_ndb_ptr->d_a5mode = a5mode |
||
555 | * l1s_dsp_com.dsp_ndb_ptr->a_kc |
||
556 | |||
557 | ==== l1ddsp_stop_tch() ==== |
||
558 | Set |
||
559 | * l1s_dsp_com.dsp_db_w_ptr->d_ctrl_tch |= (B_STOP_TCH_UL|B_STOP_TCH_DL) |
||
560 | |||
561 | ==== l1ddsp_end_scenario() ==== |
||
562 | |||
563 | * l1s_dsp_com.dsp_w_page |
||
564 | * l1s_dsp_com.dsp_ndb_ptr->d_dsp_page |
||
565 | * call l1dmacro_set_frame_it() |
||
566 | |||
567 | ==== l1dmacro_set_frame_it() ==== |
||
568 | |||
569 | Enable GSM Frame Interrupt on next TDMA frame |
||
570 | |||
571 | Typically called at the end of processing a TDMA frame interrupt |
||
572 | |||
573 | ==== l1d_reset_hw(UWORD32 offset_value) ==== |
||
574 | |||
575 | === TPU Macros (Layer1/L1d/src/l1d_Tpu.hm) === |
||
576 | |||
577 | ==== MC_L1D_TPU_REWIND ==== |
||
578 | Re-initialize the global current TPU pointer to L1D_TPU_RAM. |
||
579 | |||
580 | ==== MC_L1D_TPU_SLEEP ==== |
||
581 | Sleep for one TPU tick (instruction 0) |
||
582 | |||
583 | ==== MC_L1D_TPU_MOVE(addr,data) ==== |
||
584 | Put a MOVE instruction at the current TPU pointer |
||
585 | |||
586 | ==== MC_L1D_TPU_AT(time) ==== |
||
587 | Put an AT instruction at the current TPU pointer |
||
588 | |||
589 | ==== MC_L1D_TPU_SYNC(time) ==== |
||
590 | Put a SYNC instruction at the current TPU pointer |
||
591 | |||
592 | ==== MC_L1D_TPU_WAIT(time) ==== |
||
593 | Put a WAIT instruction at the current TPU pointer |
||
594 | |||
595 | ==== MC_L1D_TPU_OFFSET(time) ==== |
||
596 | Put a OFFSET instruction at the current TPU pointer |
||
597 | |||
598 | ==== MC_L1D_TSP_ACT_INIT(signal) ==== |
||
599 | * set v_L1d_TspActValue == signal |
||
600 | * issue MC_L1D_TPU_MOVE instructions for L1D_TSP_ACTX and L1D_TSP_ACT |
||
601 | |||
602 | ==== MC_L1D_TSP_ACT_SET(signal) ==== |
||
603 | * set v_L1d_TspActValue |= signal |
||
604 | * issue MC_L1D_TPU_MOVE instructions as required |
||
605 | |||
606 | ==== MC_L1D_TSP_ACT_RESET(signal) ==== |
||
607 | * unset v_L1d_TspActValue |= signal |
||
608 | * issue MC_L1D_TPU_MOVE instructions as required |
||
609 | |||
610 | === TPU (Layer1/L1d/src/l1d_Tpu.c) === |
||
611 | |||
612 | ==== TP_Reset(u16 on) ==== |
||
613 | * Issue L1D_TPU_CTRL_RESET in L1D_TPU_CTRL register |
||
614 | * Wait until reset has been asserted |
||
615 | |||
616 | ==== TP_Enable(u16 on) ==== |
||
617 | * Set or unset L1D_TPU_CTRL_T_ENBL in L1D_TPU_CTRL |
||
618 | |||
619 | ==== l1dmacro_idle(void) ==== |
||
620 | |||
621 | ==== l1dmacro_offset(u32 offset_value, s32 relative_time) ==== |
||
622 | |||
623 | ==== l1dmacro_synchro(u32 when, u32 value) ==== |
||
624 | |||
625 | ==== TPU_ClkEnable(SYS_UWORD16 on) ==== |
||
626 | * Set or unset L1D_TPU_CTRL_CLK_EN in TPU_CTRL |
||
627 | * wait until change becomes active |
||
628 | |||
629 | ==== TPU_FrameItEnable(void) ==== |
||
630 | * Enable Frame interrupt by TPU_CTRL_D_ENBL in TPU_CTRL |
||
631 | |||
632 | ==== l1dmacro_set_frame_it(void) ==== |
||
633 | * Call TPU_FrameItEnable() |
||
634 | |||
635 | ==== l1pdmacro_it_dsp_gen(WORD16 time) |
||
636 | * MC_L1D_TPU_AT (time); |
||
637 | * MC_L1D_TPU_MOVE (L1D_TPU_IT_DSP_PG,0x0001); |
||
638 | |||
639 | ==== l1pdmacro_anchor(WORD16 time) |
||
640 | * MC_L1D_TPU_AT (time); |
||
641 | |||
642 | ==== TPU_check_IT_DSP(void) ==== |
||
643 | * check if an IT DSP is still pending |
||
644 | |||
645 | === RF Frontend Driver === |
||
646 | |||
647 | ==== l1d0_0ActivateTx (u16 vp_Start, u8 vp_TxPwr, u8 vp_Band) ==== |
||
648 | Activate TX path of the radio section to transmit a burst |
||
649 | |||
650 | ==== l1d0_1DeactivateTx (u16 vp_Start, u8 vp_TxPwr, u8 vp_Band) ==== |
||
651 | |||
652 | ==== l1d0_2CalcArfcnNcntValue(u16 vp_Arfcn, u8 vp_TxRx, u8 vp_Band) ==== |
||
653 | Calculate N-Counter for RF-PLL |
||
654 | |||
655 | ==== l1d0_3BuildGainReg(u16 vp_Arfcn, u8 vp_Band, t_L1d_Level *pp_Level) ==== |
||
656 | Calculate AGC register prior to Rx |
||
657 | |||
658 | ==== l1d0_4DeactivateRx(u16 vp_Start) ==== |
||
659 | Deactivate Radio Rx power control paths |
||
660 | |||
661 | ==== l1d0_6RxWinCtrl(u16 vp_Arfcn, u8 vp_WinId, t_L1d_Level *pp_level, u8 vp_Fb26SpecialCase) ==== |
||
662 | Program everything on Vega & LMX for TX path |
||
663 | |||
664 | ==== l1d0_7TxWinCtrl(u16 vp_Arfcn, u8 vp_WinId, u8 vp_TxPwr) ==== |
||
665 | Programs everything on vega & LMX for TX path except power ramping |
||
666 | |||
667 | ==== l1d0_8ILToGain(u16 vp_Arfcn, u8 vp_Band, t_L1d_Level *pp_level) ==== |
||
668 | Computes the various gains to be programmed in the LMX3411 RF chip according to the expected input level at the antenna |
||
669 | |||
670 | ==== l1d0_13ActivateRx (u16 vp_Start, u8 vp_Band) ==== |
||
671 | Activate the Radio Rx path |
||
672 | |||
673 | ==== l1d0_15RfInit(void) ==== |
||
674 | Initialization routine for RF |
||
675 | |||
676 | ==== l1d0_16ProgRfArfcn(u16 vp_Arfcn, u8 vp_TxRx, u8 vp_Band) ==== |
||
677 | Program RF synthesizer N-Counter |
||
678 | |||
679 | ==== l1dmacro_reset_hw(u32 vp_ServingCellOffset) ==== |
||
680 | Reset and set OFFSET register serving cell offset |
||
681 | |||
682 | ==== l1dmacro_init_hw(void) ==== |
||
683 | Reset VEGA, then remove reset & Init RF synthesizers |
||
684 | |||
685 | ==== l1d_GenerateLMXRCountRegister(u8 vp_Band, u8 vp_TxRx) ==== |
||
686 | Creates R counter register for LMX |
||
687 | |||
688 | == Data Structures == |
||
689 | |||
690 | === l1s (Layer1/L1c/Inc/l1_defty.h:T_L1S_GLOBAL) === |
||
691 | Global Layer1 Sync variables, such as |
||
692 | * L1S Task Management |
||
693 | * MFTAB management variables |
||
694 | * Control Parameters (TOA) |
||
695 | * TPU and DSP control registers |
||
696 | * Frame Number Management for serving cell (actual_time, next_time, next_plus_time) |
||
697 | * TX Power management |
||
698 | * RXqual mesurement |
||
699 | |||
700 | === l1a (Layer1/L1c/Inc/l1_defty.h:T_L1A_GLOBAL) === |
||
701 | Global Layer1 Async variables, such as |
||
702 | * State for L1A machines (1 for each L1A_PROCESS) |
||
703 | * L1A Task management |
||
704 | * MEasurement task management |
||
705 | |||
706 | === l1a_l1s_com (T_L1A_L1S_COM) === |
||
707 | Communication Structure from L1A into L1S |
||
708 | * serving cell identity / information |
||
709 | * parameters for idle mode |
||
710 | * parameters for CBCH |
||
711 | * random access information |
||
712 | * ADC management |
||
713 | * TXPWR management |
||
714 | * dedicated channel parameters (T_DEDIC_PARAM) |
||
715 | * neighbor cell information |
||
716 | * BA list / FULL list |
||
717 | * L1S task management |
||
718 | * measurement tasks management |
||
719 | * input level memory for AGC management |
||
720 | |||
721 | === l1s_dsp_com (T_L1S_DSP_COM) === |
||
722 | Communication structure for L1S -> DSP communication |
||
723 | * active page for ARM writing to DSP |
||
724 | * active page for ARM reading from DSP |
||
725 | * pointers to dual-buffered (DB) and non-dual-buffered (NDB) MCU<->DSP pages |
||
726 | |||
727 | ==== T_DB_MCU_TO_DSP === |
||
728 | * {downlink,uplink} task {command, burst identifier} |
||
729 | * d_task_d -- Downlink DSP task number |
||
730 | * d_burst_d -- Downlink burst identifier |
||
731 | * d_task_u -- Uplink DSP task number |
||
732 | * d_burst_u -- Uplink burst identifier |
||
733 | * d_task_md -- downlink monitoring (FB/SB) command |
||
734 | * d_background -- background tasks |
||
735 | * d_debug -- Debug/Acknowledge/general purpose word |
||
736 | * d_task_ra -- RA task command |
||
737 | * d_fn -- frane mumber in case of TCH |
||
738 | {{{ |
||
739 | // bit [0..7] -> b_fn_report, FN in the normalized reporting period. |
||
740 | // bit [8..15] -> b_fn_sid, FN % 104, used for SID positionning. |
||
741 | }}} |
||
742 | * d_ctrl_tch -- TCH description |
||
743 | {{{ |
||
744 | // bit [0..3] -> b_chan_mode, channel mode. |
||
745 | // bit [4..5] -> b_chan_type, channel type. |
||
746 | // bit [6] -> reset SACCH. |
||
747 | // bit [7] -> vocoder ON |
||
748 | // bit [8] -> b_sync_tch_ul, synchro. TCH/UL. |
||
749 | // bit [9] -> b_sync_amr, |
||
750 | // bit [10] -> b_stop_tch_ul, stop TCH/UL. |
||
751 | // bit [11] -> b_stop_tch_dl, stop TCH/DL. |
||
752 | // bit [12.14] -> b_tch_loop, tch loops A/B/C. |
||
753 | // bit [15] -> b_subchannel |
||
754 | }}} |
||
755 | * d_ctrl_abb -- Bit field indicating teh analog baseband register to send |
||
756 | {{{ |
||
757 | // bit [0] -> b_ramp: the ramp information(a_ramp[]) is located in NDB |
||
758 | // bit [1.2] -> unused |
||
759 | // bit [3] -> b_apcdel: delays-register in NDB |
||
760 | // bit [4] -> b_afc: freq control register in DB |
||
761 | // bit [5..15] -> unused |
||
762 | }}} |
||
763 | * da_a5fn -- encryption frame number |
||
764 | {{{ |
||
765 | // word 0, bit [0..4] -> T2. |
||
766 | // word 0, bit [5..10] -> T3. |
||
767 | // word 1, bit [0..11] -> T1. |
||
768 | }}} |
||
769 | * d_power_ctl -- power level control (L1D_AUXAPC|n) |
||
770 | * d_afc -- AFC value (enabled by b_afc in d_ctrl_abb) |
||
771 | * d_ctrl_system -- Control Register for RESET/RESUME |
||
772 | {{{ |
||
773 | // bit [0..2] -> b_tsq, training sequence. |
||
774 | // bit [3] -> b_bcch_freq_ind, BCCH frequency indication. |
||
775 | // bit [15] -> b_task_abort, DSP task abort command. |
||
776 | }}} |
||
777 | |||
778 | ==== T_DB_DSP_TO_MCU ==== |
||
779 | * {downlink,uplink} task {command, burst identifier} |
||
780 | * d_task_d |
||
781 | * d_burst_d |
||
782 | * d_task_u |
||
783 | * d_burst_u |
||
784 | * d_task_md -- downlink monitoring (FB/SB) command |
||
785 | * number of cells to monitor |
||
786 | * d_background -- background tasks |
||
787 | * d_task_ra -- RA task command |
||
788 | * a_serv_Demod -- Serv. cell demod. result, array of 4 words (TOA,PM,ANGLE,SNR) |
||
789 | * a_pm -- Power measurement results, array of 3 words |
||
790 | * a_sch -- Header + SB information, array of 5 words |
||
791 | |||
792 | ==== T_NDB_MCU_DSP ==== |
||
793 | * d_dsp_page |
||
794 | {{{ |
||
795 | // bit[0] -> B_GSM_PAGE: which of the two double-buffered pages is current |
||
796 | // bit[1] -> B_GSM_TASK: is the GSM TASK active? |
||
797 | // bit[2] -> B_MISC_PAGE: which of the two misc pages is current |
||
798 | // bit[3] -> B_MISC_TASK: are MISC tasks active? |
||
799 | }}} |
||
800 | * d_error_status -- DSP status returned (DSP->MCU) |
||
801 | * d_spcx_rif -- RIF control (MCU->DSP), always set to 0x179 |
||
802 | * d_tch_mode -- TCH mode register |
||
803 | {{{ |
||
804 | // bit [0..1] -> b_dai_mode. |
||
805 | // bit [2] -> b_dtx. |
||
806 | // bit[3] -> play_ul when set to 1 |
||
807 | // bit[4] -> play_dl when set to 1 |
||
808 | // bit[5] -> DTX selection for voice memo |
||
809 | // bit[6] -> Reserved for ciphering debug |
||
810 | // bit[7..10] -> Reserved for ramp up control |
||
811 | // bit[11] -> Reserved for analog device selection |
||
812 | }}} |
||
813 | * d_debug1 -- bit 0 at 1 enable dsp f_tx delay of 400000 cyc DEBUG |
||
814 | * d_dsp_test |
||
815 | * API version number information |
||
816 | * d_version_number1 -- code version number |
||
817 | * d_version_number2 -- patch version number |
||
818 | * debug buffer for tracing |
||
819 | * p_debug_buffer |
||
820 | * d_debug_buffer_size |
||
821 | * d_debug_trace_type |
||
822 | * d_dsp_state -- DSP report its stata: 0 run, 1 Idle1, 2 Idle2, 3 Idle3 |
||
823 | * p_debug_amr -- AMR debugging |
||
824 | * d_mcsi_select -- Related to the MCSI bus interface |
||
825 | * New words APCDEL1 and APCDEL2 for 2TX: TX/PRACH combinations |
||
826 | * d_apcdel1_bis |
||
827 | * d_apcdel2_bis |
||
828 | * New registres due to IOTA ABB |
||
829 | * d_apcdel2 -- copied from l1config.params.apcdel2 |
||
830 | * d_vbctrl2 |
||
831 | * d_bulgcal -- Calibration value copied from l1_config.params.bulgcal |
||
832 | * Analog Base Band |
||
833 | * d_afcctladd -- Copied form l1_config.params.afcctladd |
||
834 | * d_vbuctrl -- Voice Uplink Control? |
||
835 | * d_vbdctrl -- Voice Downlink Control? |
||
836 | * d_apcdel1 -- APC? |
||
837 | * d_apcoff -- APC? |
||
838 | * d_bulioff -- Copied from l1_config.params.bulioff |
||
839 | * d_bulqoff -- Copied from l1_config.params.bulqoff |
||
840 | * d_dai_onoff -- Copied from l1_config.params.dai_onoff |
||
841 | * d_auxdac -- |
||
842 | * d_bbctrl |
||
843 | * results of monitoring tasks (FB + SB) DSP->MCU |
||
844 | * d_fb_det -- FB detection result (1 for FOUND) |
||
845 | * d_fb_mode -- Mode for FB detection algorithm |
||
846 | * FB_MODE_0 -- wideband search for FB detection |
||
847 | * FB_MODE_1 |
||
848 | * a_async_demod[4] -- FB/SB demod. result (TOA,PM,ANGLE,SNR) |
||
849 | * audio gain for upolink and downlink |
||
850 | * d_audio_gain_ul |
||
851 | * d_audio_gain_dl |
||
852 | * audio playback related data |
||
853 | * d_audio_compressor_ctrl |
||
854 | * d_audio_init |
||
855 | * d_audio_status |
||
856 | * Tones (MCU -> DSP) |
||
857 | * d_toneskb_init |
||
858 | * d_toneskb_status |
||
859 | * d_k_x1_t0 |
||
860 | * d_k_x1_t1 |
||
861 | * d_k_x1_t2 |
||
862 | * d_pe_rep |
||
863 | * d_pe_off |
||
864 | * d_se_off |
||
865 | * d_bu_off |
||
866 | * d_t0_on |
||
867 | * d_t0_off |
||
868 | * d_t1_on |
||
869 | * d_t1_off |
||
870 | * d_t2_on |
||
871 | * d_t2_off |
||
872 | * d_k_x1_kt0 |
||
873 | * d_k_x1_kt1 |
||
874 | * d_dur_kb |
||
875 | * d_shiftdl |
||
876 | * d_shiftul |
||
877 | * d_aec_ctrl |
||
878 | * d_es_level_api |
||
879 | * d_mu_api |
||
880 | * melody ringer module |
||
881 | * d_melo_osc_used |
||
882 | * d_melo_osc_active |
||
883 | * a_melo_route0 ... a_melo_route7 |
||
884 | * d_melody_selection -- selection of melody format |
||
885 | * speech recognition related data |
||
886 | * d_sr_status |
||
887 | * d_sr_param -- parameters for the DSP speech recognition task: OOV threshold |
||
888 | * d_sr_bit_exact_test |
||
889 | * d_sr_nb_words -- number of words used in the speech recognition task |
||
890 | * d_sr_db_level -- Estimate voice level in dB |
||
891 | * d_sr_db_noise -- Estimate noise in dB |
||
892 | * a_n_best_words -- Array of the 4 best words |
||
893 | * a_n_best_score -- Array of the 4 best scores (32bit for each score) |
||
894 | * audio buffer |
||
895 | * a_dd_1[22] |
||
896 | * a_du_1[22] |
||
897 | * v42bis module |
||
898 | * d_v42b_nego0 |
||
899 | * d_v42b_nego1 |
||
900 | * d_v42b_control |
||
901 | * d_v42b_ratio_ind |
||
902 | * d_mcu_control |
||
903 | * d_mcu_control_sema |
||
904 | * background tasks |
||
905 | * d_background_enable |
||
906 | * B_DSPBGD_RECO -- background recognition task code |
||
907 | * C_BGD_RECOGN |
||
908 | * B_DSPBGD_UPD -- start of alignment update in dsp background |
||
909 | * C_BGD_ALIGN |
||
910 | * d_background_abort |
||
911 | * d_background_state |
||
912 | * d_max_background |
||
913 | * a_background_tasks[16] |
||
914 | * a_back_task_io[16] |
||
915 | * GPRS/GEA ciphering info |
||
916 | * d_gea_mode_ovly |
||
917 | * a_gea_kc_ovly[4] |
||
918 | * d_thr_usf_detect -- word used for the init of USF threshold |
||
919 | * d_a5mode -- A5 encryption mode |
||
920 | * d_sched_mode_grps_ovly |
||
921 | * a_ramp[16] -- power ramp information |
||
922 | * actual data inside logical channels |
||
923 | * a_cd[15] -- CCCH/SACCH downlink information |
||
924 | * a_fd[15] -- FACCH downlink information |
||
925 | * a_dd_0[22] -- traffic downlink data frames |
||
926 | * a_cu[15] -- CCCH/SACCH uplink information |
||
927 | * a_fu[15] -- FACCH upilink information |
||
928 | * a_du_0[22] -- TCH upilink data frames |
||
929 | * d_rach -- RACH information (MCU -> DSP) |
||
930 | * a_kc[4] -- Kc (MCU->DSP) |
||
931 | * integrated data services module |
||
932 | * speech recognition model |
||
933 | * EOTD related data |
||
934 | * AMR v1.0 buffers |
||
935 | * a_amr_config[4] |
||
936 | * a_ratscch_ul[6] |
||
937 | * a_ratscch_dl[6] |
||
938 | * d_amr_snr_est -- estimation of the SNR of the AMR speech block |
||
939 | * detection thresholds |
||
940 | |||
941 | ==== T_PARAM_MCU_DSP ==== |
||
942 | |||
943 | All parameters are initialized at dsp_power_on() time form a static array. |
||
944 | |||
945 | * d_transfer_rate |
||
946 | * GPRS related latencies |
||
947 | * d_lat_mcu_bridge |
||
948 | * d_lat_mcu_hom2sam |
||
949 | * d_lat_mcu_bef_fast_access |
||
950 | * d_lat_dsp_after_sam |
||
951 | * d_grps_install_address (dsp start address) |
||
952 | * d_misc_config |
||
953 | * d_cn_sw_workaround |
||
954 | * d_fb_margin_beg |
||
955 | * Frequency Correction Burst (FB) |
||
956 | * d_fb_margin_beg |
||
957 | * d_fb_margin_end |
||
958 | * d_nsubb_idle |
||
959 | * d_nsubb_dedic |
||
960 | * d_fb_thr_det_iacq |
||
961 | * d_fb_thr_det_track |
||
962 | * Demodulation |
||
963 | * d_dc_off_thres |
||
964 | * d_dummy_thres |
||
965 | * d_dem_pond_gewl |
||
966 | * d_dem_pond_red |
||
967 | * TCH/F V1 Full-Rate Speech |
||
968 | * d_maccthresh1 |
||
969 | * d_mldt |
||
970 | * d_maccthresh |
||
971 | * d_gu |
||
972 | * d_go |
||
973 | * d_attmax |
||
974 | * d_sm |
||
975 | * d_b |
||
976 | * V42bis related data |
||
977 | * TCH/H V1 Half-Rate |
||
978 | * d_ldT_hr |
||
979 | * d_maccthresh_hr |
||
980 | * d_maccthresh1_hr |
||
981 | * d_gu_hr |
||
982 | * d_go_hr |
||
983 | * d_sm_hr |
||
984 | * d_attmax_hr |
||
985 | * TCH/F V2 EFR |
||
986 | * c_mldt_efr |
||
987 | * c_maccthresh_efr |
||
988 | * c_maccthresh1_efr |
||
989 | * c_gu_efr |
||
990 | * c_go_efr |
||
991 | * c_b_efr |
||
992 | * c_sm_efr |
||
993 | * c_attmax_efr |
||
994 | * CHED |
||
995 | * FACCH module |
||
996 | * d_facch_thr |
||
997 | * IDS module |
||
998 | * FIR coefficients |
||
999 | * a_fir31_uplink[31]; |
||
1000 | * a_fir32_downlink[31]; |
||
1001 | |||
1002 | === l1s_tpu_com (T_L1S_TPU_COM) === |