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E1 Interface Blocks » History » Version 3

laforge, 05/04/2018 08:35 PM
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h1. E1 Interface Blocks
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An E1 interface is typically split into a couple of different blocks
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h2. Transformer / Magnetics
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The transformer perfrorms galvanic isolation between the wires of the line/cable and the E1 interface circuit.  Think of Ethernet, which follows the exact same principle.
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h2. Line Interface Unit (LIU)
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The LIU sits between the E1 controller and the magnetics
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The LIU is responsible for
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* converting the received ternary HDB3 encoding into a stream of binary bits
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* converting to-be-transmitted binary bits into ternary HDB3 encoding
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Sometimes, further functionality such as clock recovery, loopback, jitter attenuator, ... are built into the LIU.
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h3. XRT59L91
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An example for a very simple LIU is the "Exar XRT59L91":https://www.exar.com/ds/xrt59l91v100.pdf. It only contains
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* Rx: receive equalizer, peak detector, LOS detector
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* Tx: pulse shaping, output drivers
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It doesn't even do any HDB3 encoding/decoding or clock recovery
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h3. XRT82D20
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An example for a medium complexity LIU is the "Exar XRT82D20":https://www.exar.com/ds/xrt82d20_v108_082806.pdf. It contains
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* transmit side
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** HDB3 encoder
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** Tx pulse shaper for both 75 Ohms coax and 120 Ohms twisted pair
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** line driver
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* receiver side
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** peak detector, data slicer, LOS detect (to digital output)
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** data + timing recovery
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** hdb3 decoder
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* digital, local and remote loopback capability
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Compared to the XRT59L91, the significant addition is the HDB3 en/decoders and the timing recovery.
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h3. IDT82V2081
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An example for an even more higher end LIU is the "IDT82V2081":https://zh.idt.com/document/dst/82v2081-datasheet. compared to the XRT82D20, it contains
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* adaptive internal termination for rx and tx
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* adaptive equalizer on receive side
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* PRBS detector / generator
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* ILBC detector / generator
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* not only E1, but also T1 + J1 compatibility
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* SPI or parallel bus control interface
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We're using the IDT82V2081 in the osmo-e1-xcvr evaluation board.
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Another example in this category is the "Dallas/Maxim DS21348":https://datasheets.maximintegrated.com/en/ds/DS21348-DS21Q348.pdf
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h2. E1 Controller "framer"
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The E1 controller is what implements
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* frame (and multiframe) alignment
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* CRC4 generation/verification
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* HDLC processors for the individual timeslots
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* interface with the host computer
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Examples for such controllers are
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* Siemens/Infineon FALC/DualFALCQuadFALC/OctalFALC, LIU + Framer + HDLC + parallel bus interface)
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** used in many BTS/telecom equipment, but also in Digium E1/T1 cards
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** *obsolete/EOL*
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* "CologneChip HFC-E1":http://www.colognechip.com/hfc-e1.pdf (LIU + Framer + HDLC + DMA engine with PCI bus interface)
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** used in PCI cards we used for original OpenBSC development with Siemens BS-11 BTS
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** supported by mISDN
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* "Exar XRT86VL30":https://www.exar.com/ds/86vl30t1_v101_121809.pdf (LIU + Framer + HDLC + DMA engine with intel/motorola parallel bus)
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* "Dallas/Maxim DS26521":https://datasheets.maximintegrated.com/en/ds/DS26521.pdf (SPI or parallel bus, TDM Backplane)
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