Revision 31f31e24
Added by Kévin Redon over 4 years ago
| hardware/kicad/SIMtrace.sch | ||
|---|---|---|
| 827 | 827 |
F 1 "ERASE" H 3800 1000 40 0000 C CNN |
| 828 | 828 |
F 2 "PIN_ARRAY_2X1" H 4150 950 60 0001 C CNN |
| 829 | 829 |
F 3 "" H 4150 950 60 0001 C CNN |
| 830 |
F 4 "NP" H 4150 1000 50 0000 C CNN "Place" |
|
| 831 |
F 5 "the pertruding through pins might get shorted when the board lies on a conductive surface, leading to unwanted flash erase" H 4150 950 50 0001 C CNN "Note" |
|
| 830 | 832 |
1 4150 950 |
| 831 | 833 |
-1 0 0 -1 |
| 832 | 834 |
$EndComp |
| ... | ... | |
| 838 | 840 |
F 1 "TEST" H 4500 1100 40 0000 C CNN |
| 839 | 841 |
F 2 "PIN_ARRAY_2X1" H 4150 1050 60 0001 C CNN |
| 840 | 842 |
F 3 "" H 4150 1050 60 0001 C CNN |
| 843 |
F 4 "NP" H 4150 1100 50 0000 C CNN "Place" |
|
| 844 |
F 5 "the pertruding through pins might get shorted when the board lies on a conductive surface, leading to false signal" H 4150 1050 50 0001 C CNN "Note" |
|
| 841 | 845 |
1 4150 1050 |
| 842 | 846 |
1 0 0 -1 |
| 843 | 847 |
$EndComp |
Also available in: Unified diff
schematic: mark JP1 and JP2 as dot no place
the protruding through hole pins of the header for the jumper
might get shorted when the board lies on a conductive surface,
leading to unwanted flash erase (JP2) or false TST signal (JP1)
Change-Id: I7fc6176d8c63ab8274b641e7bcd990093af3c4ca