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010aaff9
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laforge
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/* Synchronize TC_CDIV divided sample clock with the SOF of the packet */
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#include <lib_AT91SAM7.h>
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#include <AT91SAM7.h>
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#include <os/dbgu.h>
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#include "../openpcd.h"
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//#define USE_IRQ
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373c172a
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Harald Welte
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static uint8_t enabled;
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010aaff9
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laforge
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373c172a
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Harald Welte
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static void pio_data_change(uint32_t pio)
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010aaff9
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laforge
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{
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2b28edee
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laforge
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DEBUGP("PIO_FRAME_IRQ: ");
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/* we get one interrupt for each change. If now, after the
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* change the level is high, then it must have been a rising
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* edge */
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if (*AT91C_PIOA_PDSR & OPENPICC_PIO_FRAME) {
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*AT91C_TC0_CCR = AT91C_TC_SWTRG;
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DEBUGPCR("CDIV_SYNC_FLIP SWTRG CV=0x%08x",
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*AT91C_TC0_CV);
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} else
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DEBUGPCR("");
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010aaff9
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laforge
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}
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2b28edee
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laforge
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#if 0
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010aaff9
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laforge
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static void __ramfunc cdsync_cb(void)
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{
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2b28edee
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laforge
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DEBUGP("PIO_IRQ: ");
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if (*AT91C_PIOA_ISR & OPENPICC_PIO_FRAME) {
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DEBUGP("PIO_FRAME_IRQ: ");
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010aaff9
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laforge
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/* we get one interrupt for each change. If now, after the
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2b28edee
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laforge
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* change the level is high, then it must have been a rising
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010aaff9
|
laforge
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* edge */
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2b28edee
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laforge
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if (*AT91C_PIOA_PDSR & OPENPICC_PIO_FRAME) {
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010aaff9
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laforge
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*AT91C_TC0_CCR = AT91C_TC_SWTRG;
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2b28edee
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laforge
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DEBUGPCR("CDIV_SYNC_FLIP SWTRG CV=0x%08x",
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*AT91C_TC0_CV);
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} else
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DEBUGPCR("");
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} else
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DEBUGPCR("");
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010aaff9
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laforge
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}
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2b28edee
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laforge
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#endif
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010aaff9
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laforge
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void tc_cdiv_sync_reset(void)
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{
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if (enabled) {
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373c172a
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Harald Welte
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uint32_t tmp = *AT91C_PIOA_ISR;
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2b28edee
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laforge
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volatile int i;
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DEBUGPCRF("CDIV_SYNC_FLOP");
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/* reset the hardware flipflop */
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AT91F_PIO_ClearOutput(AT91C_BASE_PIOA,
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OPENPICC_PIO_SSC_DATA_CONTROL);
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for (i = 0; i < 0xff; i++) ;
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AT91F_PIO_SetOutput(AT91C_BASE_PIOA,
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OPENPICC_PIO_SSC_DATA_CONTROL);
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010aaff9
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laforge
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}
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}
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void tc_cdiv_sync_disable(void)
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{
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enabled = 0;
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2b28edee
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laforge
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*AT91C_PIOA_IDR = OPENPICC_PIO_FRAME;
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010aaff9
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laforge
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}
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void tc_cdiv_sync_enable(void)
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{
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enabled = 1;
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2b28edee
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laforge
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DEBUGPCRF("CDIV_SYNC_ENABLE ");
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010aaff9
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laforge
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tc_cdiv_sync_reset();
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2b28edee
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laforge
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*AT91C_PIOA_IER = OPENPICC_PIO_FRAME;
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010aaff9
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laforge
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}
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extern void (*fiq_handler)(void);
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void tc_cdiv_sync_init(void)
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{
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DEBUGPCRF("initializing");
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enabled = 0;
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AT91F_PIOA_CfgPMC();
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#ifdef USE_IRQ
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/* Configure IRQ */
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AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_PIOA,
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AT91C_AIC_PRIOR_HIGHEST,
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AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &cdsync_cb);
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#else
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/* Configure FIQ */
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AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_FIQ,
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//0, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &cdsync_cb);
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0, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &fiq_handler);
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/* enable fast forcing for PIOA interrupt */
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*AT91C_AIC_FFER = (1 << AT91C_ID_PIOA);
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/* register pio irq handler */
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2b28edee
|
laforge
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pio_irq_register(OPENPICC_PIO_FRAME, &pio_data_change);
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010aaff9
|
laforge
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#endif
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AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_PIOA);
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tc_cdiv_sync_disable();
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}
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