1 |
dd0638d2
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(no author)
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/* Philips CL RC632 driver (via SPI) for OpenPCD firmware
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2 |
f57b548d
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(no author)
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* (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
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3 |
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*
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4 |
dd0638d2
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(no author)
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* This is heavily based on the librfid RC632 driver. All primitive access
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5 |
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* functions such as rc632_{reg,fifo}_{read,write}() are API compatible to
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6 |
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* librfid in order to be able to leverage higher-level code from librfid
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7 |
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* to this OpenPCD firmware.
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8 |
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*
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9 |
32985a29
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laforge
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* AT91SAM7 PWM routines for OpenPCD / OpenPICC
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10 |
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* (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
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11 |
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*
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12 |
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* This program is free software; you can redistribute it and/or modify
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13 |
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* it under the terms of the GNU General Public License as published by
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14 |
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* the Free Software Foundation; either version 2 of the License, or
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15 |
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* (at your option) any later version.
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16 |
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*
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17 |
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* This program is distributed in the hope that it will be useful,
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18 |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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19 |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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20 |
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* GNU General Public License for more details.
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21 |
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*
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22 |
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* You should have received a copy of the GNU General Public License
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23 |
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* along with this program; if not, write to the Free Software
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24 |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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25 |
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*
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26 |
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*/
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27 |
f57b548d
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(no author)
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28 |
8a863d16
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(no author)
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#include <string.h>
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29 |
81416e6a
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(no author)
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#include <errno.h>
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30 |
9d0d7022
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(no author)
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#include <lib_AT91SAM7.h>
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31 |
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#include <cl_rc632.h>
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32 |
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#include <openpcd.h>
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33 |
520784c7
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(no author)
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#include "../openpcd.h"
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34 |
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#include <os/fifo.h>
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35 |
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#include <os/dbgu.h>
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36 |
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#include <os/pcd_enumerate.h>
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37 |
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#include <os/usb_handler.h>
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38 |
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#include <os/req_ctx.h>
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39 |
dd0638d2
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(no author)
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#include "rc632.h"
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40 |
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41 |
28eb4a57
|
laforge
|
#include <librfid/rfid_asic.h>
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42 |
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43 |
174e6403
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(no author)
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#define NOTHING do {} while(0)
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44 |
616c33c4
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(no author)
|
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45 |
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#if 0
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46 |
c7367692
|
(no author)
|
#define DEBUGPSPI DEBUGP
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47 |
616c33c4
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(no author)
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#define DEBUGPSPIIRQ DEBUGP
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48 |
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#else
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49 |
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#define DEBUGPSPI(x, args ...) NOTHING
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50 |
174e6403
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(no author)
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#define DEBUGPSPIIRQ(x, args...) NOTHING
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51 |
616c33c4
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(no author)
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#endif
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52 |
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53 |
c96e8111
|
laforge
|
#if 0
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54 |
616c33c4
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(no author)
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#define DEBUG632 DEBUGPCRF
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55 |
c7367692
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(no author)
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#else
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56 |
616c33c4
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(no author)
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#define DEBUG632(x, args ...) NOTHING
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57 |
c7367692
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(no author)
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#endif
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58 |
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59 |
616c33c4
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(no author)
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60 |
dd0638d2
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(no author)
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/* SPI driver */
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61 |
caf50003
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(no author)
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62 |
9d0d7022
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(no author)
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#ifdef OLIMEX
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63 |
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#define SPI_DEBUG_LOOPBACK
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64 |
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#endif
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65 |
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66 |
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#define SPI_USES_DMA
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67 |
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68 |
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#define SPI_MAX_XFER_LEN 65
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69 |
8a863d16
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(no author)
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70 |
183a6122
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(no author)
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static const AT91PS_SPI pSPI = AT91C_BASE_SPI;
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71 |
872a81da
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(no author)
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72 |
a5a204c6
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(no author)
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/* SPI irq handler */
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73 |
f57b548d
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(no author)
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static void spi_irq(void)
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74 |
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{
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75 |
373c172a
|
Harald Welte
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uint32_t status = pSPI->SPI_SR;
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76 |
f57b548d
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(no author)
|
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77 |
616c33c4
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(no author)
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DEBUGPSPIIRQ("spi_irq: 0x%08x ", status);
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78 |
41333333
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(no author)
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79 |
f7d6875c
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(no author)
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if (status & AT91C_SPI_OVRES)
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80 |
616c33c4
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(no author)
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DEBUGPSPIIRQ("Overrun ");
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81 |
f7d6875c
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(no author)
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if (status & AT91C_SPI_MODF)
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82 |
616c33c4
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(no author)
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DEBUGPSPIIRQ("ModeFault ");
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83 |
caf50003
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(no author)
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if (status & AT91C_SPI_ENDRX) {
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84 |
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pSPI->SPI_IDR = AT91C_SPI_ENDRX;
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85 |
616c33c4
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(no author)
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DEBUGPSPIIRQ("ENDRX ");
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86 |
caf50003
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(no author)
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}
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87 |
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if (status & AT91C_SPI_ENDTX) {
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88 |
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pSPI->SPI_IDR = AT91C_SPI_ENDTX;
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89 |
616c33c4
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(no author)
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DEBUGPSPIIRQ("ENDTX ");
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90 |
caf50003
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(no author)
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}
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91 |
f7d6875c
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(no author)
|
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92 |
616c33c4
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(no author)
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DEBUGPSPIIRQ("\r\n");
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93 |
9d0d7022
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(no author)
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94 |
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AT91F_AIC_ClearIt(AT91C_BASE_AIC, AT91C_ID_SPI);
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95 |
f7d6875c
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(no author)
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}
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96 |
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97 |
caf50003
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(no author)
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#ifdef SPI_USES_DMA
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98 |
373c172a
|
Harald Welte
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static int spi_transceive(const uint8_t *tx_data, uint16_t tx_len,
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99 |
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uint8_t *rx_data, uint16_t *rx_len)
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100 |
caf50003
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(no author)
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{
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101 |
9d0d7022
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(no author)
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DEBUGPSPI("DMA Xfer tx=%s\r\n", hexdump(tx_data, tx_len));
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102 |
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if (*rx_len < tx_len) {
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103 |
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DEBUGPCRF("rx_len=%u smaller tx_len=%u\n", *rx_len, tx_len);
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104 |
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return -1;
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105 |
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}
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106 |
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107 |
28eb4a57
|
laforge
|
/* disable RC632 interrupt because it wants to do SPI transactions */
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108 |
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AT91F_AIC_DisableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
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109 |
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110 |
9d0d7022
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(no author)
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AT91F_SPI_ReceiveFrame(pSPI, rx_data, tx_len, NULL, 0);
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111 |
caf50003
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(no author)
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AT91F_SPI_SendFrame(pSPI, tx_data, tx_len, NULL, 0);
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112 |
9d0d7022
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(no author)
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113 |
caf50003
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(no author)
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AT91F_PDC_EnableRx(AT91C_BASE_PDC_SPI);
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114 |
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AT91F_PDC_EnableTx(AT91C_BASE_PDC_SPI);
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115 |
9d0d7022
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(no author)
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116 |
caf50003
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(no author)
|
pSPI->SPI_IER = AT91C_SPI_ENDTX|AT91C_SPI_ENDRX;
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117 |
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118 |
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119 |
9d0d7022
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(no author)
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while (! (pSPI->SPI_SR & AT91C_SPI_ENDRX)) ;
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120 |
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121 |
28eb4a57
|
laforge
|
/* Re-enable RC632 interrupts */
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122 |
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AT91F_AIC_EnableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
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123 |
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124 |
9d0d7022
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(no author)
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DEBUGPSPI("DMA Xfer finished rx=%s\r\n", hexdump(rx_data, tx_len));
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125 |
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126 |
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*rx_len = tx_len;
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127 |
caf50003
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(no author)
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128 |
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return 0;
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129 |
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}
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130 |
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#else
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131 |
f7d6875c
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(no author)
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/* stupid polling transceiver routine */
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132 |
373c172a
|
Harald Welte
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static int spi_transceive(const uint8_t *tx_data, uint16_t tx_len,
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133 |
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uint8_t *rx_data, uint16_t *rx_len)
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134 |
f7d6875c
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(no author)
|
{
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135 |
373c172a
|
Harald Welte
|
uint16_t tx_cur = 0;
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136 |
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uint16_t rx_len_max = 0;
|
137 |
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uint16_t rx_cnt = 0;
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138 |
0dca1ae7
|
(no author)
|
|
139 |
fe4d6ec2
|
(no author)
|
/* disable RC632 interrupt because it wants to do SPI transactions */
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140 |
c7367692
|
(no author)
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AT91F_AIC_DisableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
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141 |
fe4d6ec2
|
(no author)
|
|
142 |
c7367692
|
(no author)
|
DEBUGPSPI("spi_transceive: enter(tx_len=%u) ", tx_len);
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143 |
0dca1ae7
|
(no author)
|
|
144 |
f7d6875c
|
(no author)
|
if (rx_len) {
|
145 |
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rx_len_max = *rx_len;
|
146 |
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*rx_len = 0;
|
147 |
872a81da
|
(no author)
|
}
|
148 |
f7d6875c
|
(no author)
|
|
149 |
9d0d7022
|
(no author)
|
//AT91F_SPI_Enable(pSPI);
|
150 |
f7d6875c
|
(no author)
|
while (1) {
|
151 |
373c172a
|
Harald Welte
|
uint32_t sr = pSPI->SPI_SR;
|
152 |
|
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uint8_t tmp;
|
153 |
0dca1ae7
|
(no author)
|
if (sr & AT91C_SPI_RDRF) {
|
154 |
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tmp = pSPI->SPI_RDR;
|
155 |
|
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rx_cnt++;
|
156 |
|
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if (rx_len && *rx_len < rx_len_max)
|
157 |
|
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rx_data[(*rx_len)++] = tmp;
|
158 |
41333333
|
(no author)
|
}
|
159 |
0dca1ae7
|
(no author)
|
if (sr & AT91C_SPI_TDRE) {
|
160 |
fe4d6ec2
|
(no author)
|
if (tx_len > tx_cur)
|
161 |
|
|
pSPI->SPI_TDR = tx_data[tx_cur++];
|
162 |
41333333
|
(no author)
|
}
|
163 |
0dca1ae7
|
(no author)
|
if (tx_cur >= tx_len && rx_cnt >= tx_len)
|
164 |
|
|
break;
|
165 |
f7d6875c
|
(no author)
|
}
|
166 |
9d0d7022
|
(no author)
|
//AT91F_SPI_Disable(pSPI);
|
167 |
fe4d6ec2
|
(no author)
|
if (rx_data)
|
168 |
c7367692
|
(no author)
|
DEBUGPSPI("leave(%02x %02x)\r\n", rx_data[0], rx_data[1]);
|
169 |
fe4d6ec2
|
(no author)
|
else
|
170 |
c7367692
|
(no author)
|
DEBUGPSPI("leave()\r\n");
|
171 |
fe4d6ec2
|
(no author)
|
|
172 |
|
|
/* Re-enable RC632 interrupts */
|
173 |
c7367692
|
(no author)
|
AT91F_AIC_EnableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
|
174 |
fe4d6ec2
|
(no author)
|
|
175 |
f7d6875c
|
(no author)
|
return 0;
|
176 |
f57b548d
|
(no author)
|
}
|
177 |
caf50003
|
(no author)
|
#endif
|
178 |
f57b548d
|
(no author)
|
|
179 |
dd0638d2
|
(no author)
|
/* RC632 driver */
|
180 |
|
|
|
181 |
|
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/* static buffers used by RC632 access primitives below.
|
182 |
|
|
* Since we only have one */
|
183 |
|
|
|
184 |
373c172a
|
Harald Welte
|
static uint8_t spi_outbuf[SPI_MAX_XFER_LEN];
|
185 |
|
|
static uint8_t spi_inbuf[SPI_MAX_XFER_LEN];
|
186 |
f57b548d
|
(no author)
|
|
187 |
|
|
#define FIFO_ADDR (RC632_REG_FIFO_DATA << 1)
|
188 |
|
|
|
189 |
6a189e61
|
laforge
|
#define RC632_WRITE_ADDR(x) ((x << 1) & 0x7e)
|
190 |
|
|
|
191 |
f57b548d
|
(no author)
|
/* RC632 access primitives */
|
192 |
|
|
|
193 |
28eb4a57
|
laforge
|
int opcd_rc632_reg_write(struct rfid_asic_handle *hdl,
|
194 |
373c172a
|
Harald Welte
|
uint8_t addr, uint8_t data)
|
195 |
f57b548d
|
(no author)
|
{
|
196 |
373c172a
|
Harald Welte
|
uint16_t rx_len = 2;
|
197 |
616c33c4
|
(no author)
|
|
198 |
|
|
DEBUG632("[0x%02x] <= 0x%02x", addr, data);
|
199 |
|
|
|
200 |
6a189e61
|
laforge
|
addr = RC632_WRITE_ADDR(addr);
|
201 |
f7d6875c
|
(no author)
|
|
202 |
|
|
spi_outbuf[0] = addr;
|
203 |
|
|
spi_outbuf[1] = data;
|
204 |
|
|
|
205 |
dd0638d2
|
(no author)
|
return spi_transceive(spi_outbuf, 2, spi_inbuf, &rx_len);
|
206 |
f57b548d
|
(no author)
|
}
|
207 |
|
|
|
208 |
6a189e61
|
laforge
|
#define RC632_REGSET_START 0x10
|
209 |
|
|
#define RC632_REGSET_END 0x3f
|
210 |
|
|
#define RC632_REGSET_MAXSIZE (RC632_REGSET_END-RC632_REGSET_START)
|
211 |
373c172a
|
Harald Welte
|
static uint8_t regset_buf[RC632_REGSET_MAXSIZE * 2];
|
212 |
6a189e61
|
laforge
|
|
213 |
28eb4a57
|
laforge
|
int opcd_rc632_reg_write_set(struct rfid_asic_handle *hdl,
|
214 |
373c172a
|
Harald Welte
|
uint8_t *regs, int len)
|
215 |
6a189e61
|
laforge
|
{
|
216 |
373c172a
|
Harald Welte
|
uint8_t i, j = 0;
|
217 |
|
|
uint16_t rx_len;
|
218 |
6a189e61
|
laforge
|
|
219 |
|
|
if (len > RC632_REGSET_MAXSIZE)
|
220 |
|
|
return -E2BIG;
|
221 |
|
|
|
222 |
|
|
for (i = RC632_REGSET_START; i <= RC632_REGSET_END; i++) {
|
223 |
|
|
/* skip bank registers */
|
224 |
|
|
if (i % 8 == 0)
|
225 |
|
|
continue;
|
226 |
|
|
regset_buf[j++] = RC632_WRITE_ADDR(i);
|
227 |
|
|
regset_buf[j++] = regs[i - RC632_REGSET_START];
|
228 |
|
|
}
|
229 |
|
|
|
230 |
|
|
rx_len = j;
|
231 |
|
|
return spi_transceive(regset_buf, j, spi_inbuf, &rx_len);
|
232 |
|
|
}
|
233 |
|
|
|
234 |
28eb4a57
|
laforge
|
int opcd_rc632_fifo_write(struct rfid_asic_handle *hdl,
|
235 |
373c172a
|
Harald Welte
|
uint8_t len, uint8_t *data, uint8_t flags)
|
236 |
f57b548d
|
(no author)
|
{
|
237 |
373c172a
|
Harald Welte
|
uint16_t rx_len = sizeof(spi_inbuf);
|
238 |
f57b548d
|
(no author)
|
if (len > sizeof(spi_outbuf)-1)
|
239 |
|
|
len = sizeof(spi_outbuf)-1;
|
240 |
|
|
|
241 |
|
|
spi_outbuf[0] = FIFO_ADDR;
|
242 |
8a863d16
|
(no author)
|
memcpy(&spi_outbuf[1], data, len);
|
243 |
f57b548d
|
(no author)
|
|
244 |
616c33c4
|
(no author)
|
DEBUG632("[FIFO] <= %s", hexdump(data, len));
|
245 |
|
|
|
246 |
0edd0722
|
laforge
|
return spi_transceive(spi_outbuf, len+1, spi_inbuf, &rx_len);
|
247 |
f57b548d
|
(no author)
|
}
|
248 |
|
|
|
249 |
28eb4a57
|
laforge
|
int opcd_rc632_reg_read(struct rfid_asic_handle *hdl,
|
250 |
373c172a
|
Harald Welte
|
uint8_t addr, uint8_t *val)
|
251 |
f57b548d
|
(no author)
|
{
|
252 |
373c172a
|
Harald Welte
|
uint16_t rx_len = 2;
|
253 |
f7d6875c
|
(no author)
|
|
254 |
f57b548d
|
(no author)
|
addr = (addr << 1) & 0x7e;
|
255 |
f7d6875c
|
(no author)
|
|
256 |
0dca1ae7
|
(no author)
|
spi_outbuf[0] = addr | 0x80;
|
257 |
f7d6875c
|
(no author)
|
spi_outbuf[1] = 0x00;
|
258 |
|
|
|
259 |
|
|
spi_transceive(spi_outbuf, 2, spi_inbuf, &rx_len);
|
260 |
dd0638d2
|
(no author)
|
*val = spi_inbuf[1];
|
261 |
|
|
|
262 |
616c33c4
|
(no author)
|
DEBUG632("[0x%02x] => 0x%02x", addr>>1, *val);
|
263 |
|
|
|
264 |
dd0638d2
|
(no author)
|
return 0;
|
265 |
f57b548d
|
(no author)
|
}
|
266 |
|
|
|
267 |
28eb4a57
|
laforge
|
int opcd_rc632_fifo_read(struct rfid_asic_handle *hdl,
|
268 |
373c172a
|
Harald Welte
|
uint8_t max_len, uint8_t *data)
|
269 |
f57b548d
|
(no author)
|
{
|
270 |
dd0638d2
|
(no author)
|
int ret;
|
271 |
373c172a
|
Harald Welte
|
uint8_t fifo_length;
|
272 |
|
|
uint8_t i;
|
273 |
|
|
uint16_t rx_len;
|
274 |
dd0638d2
|
(no author)
|
|
275 |
28eb4a57
|
laforge
|
ret = opcd_rc632_reg_read(hdl, RC632_REG_FIFO_LENGTH, &fifo_length);
|
276 |
dd0638d2
|
(no author)
|
if (ret < 0)
|
277 |
|
|
return ret;
|
278 |
|
|
|
279 |
|
|
rx_len = fifo_length+1;
|
280 |
f57b548d
|
(no author)
|
|
281 |
|
|
if (max_len < fifo_length)
|
282 |
|
|
fifo_length = max_len;
|
283 |
|
|
|
284 |
|
|
for (i = 0; i < fifo_length; i++)
|
285 |
|
|
spi_outbuf[i] = FIFO_ADDR;
|
286 |
|
|
|
287 |
0dca1ae7
|
(no author)
|
spi_outbuf[0] |= 0x80;
|
288 |
f7d6875c
|
(no author)
|
spi_outbuf[fifo_length] = 0x00;
|
289 |
f57b548d
|
(no author)
|
|
290 |
f7d6875c
|
(no author)
|
spi_transceive(spi_outbuf, fifo_length+1, spi_inbuf, &rx_len);
|
291 |
|
|
memcpy(data, spi_inbuf+1, rx_len-1);
|
292 |
|
|
|
293 |
616c33c4
|
(no author)
|
DEBUG632("[FIFO] => %s", hexdump(data, rx_len-1));
|
294 |
|
|
|
295 |
706ffa9f
|
laforge
|
return rx_len-1;
|
296 |
f57b548d
|
(no author)
|
}
|
297 |
|
|
|
298 |
28eb4a57
|
laforge
|
int opcd_rc632_set_bits(struct rfid_asic_handle *hdl,
|
299 |
373c172a
|
Harald Welte
|
uint8_t reg, uint8_t bits)
|
300 |
fe4d6ec2
|
(no author)
|
{
|
301 |
373c172a
|
Harald Welte
|
uint8_t val;
|
302 |
dd0638d2
|
(no author)
|
int ret;
|
303 |
|
|
|
304 |
28eb4a57
|
laforge
|
ret = opcd_rc632_reg_read(hdl, reg, &val);
|
305 |
dd0638d2
|
(no author)
|
if (ret < 0)
|
306 |
|
|
return ret;
|
307 |
|
|
|
308 |
fe4d6ec2
|
(no author)
|
val |= bits;
|
309 |
|
|
|
310 |
28eb4a57
|
laforge
|
return opcd_rc632_reg_write(hdl, reg, val);
|
311 |
fe4d6ec2
|
(no author)
|
}
|
312 |
|
|
|
313 |
28eb4a57
|
laforge
|
int opcd_rc632_clear_bits(struct rfid_asic_handle *hdl,
|
314 |
373c172a
|
Harald Welte
|
uint8_t reg, uint8_t bits)
|
315 |
fe4d6ec2
|
(no author)
|
{
|
316 |
373c172a
|
Harald Welte
|
uint8_t val;
|
317 |
dd0638d2
|
(no author)
|
int ret;
|
318 |
|
|
|
319 |
28eb4a57
|
laforge
|
ret = opcd_rc632_reg_read(hdl, reg, &val);
|
320 |
dd0638d2
|
(no author)
|
if (ret < 0)
|
321 |
|
|
return ret;
|
322 |
|
|
|
323 |
5d247b59
|
(no author)
|
val &= ~bits;
|
324 |
fe4d6ec2
|
(no author)
|
|
325 |
28eb4a57
|
laforge
|
return opcd_rc632_reg_write(hdl, reg, val);
|
326 |
fe4d6ec2
|
(no author)
|
}
|
327 |
|
|
|
328 |
f57b548d
|
(no author)
|
/* RC632 interrupt handling */
|
329 |
|
|
|
330 |
872a81da
|
(no author)
|
static void rc632_irq(void)
|
331 |
f57b548d
|
(no author)
|
{
|
332 |
7cffc967
|
(no author)
|
struct req_ctx *irq_rctx;
|
333 |
|
|
struct openpcd_hdr *irq_opcdh;
|
334 |
373c172a
|
Harald Welte
|
uint8_t cause;
|
335 |
7cffc967
|
(no author)
|
|
336 |
|
|
/* CL RC632 has interrupted us */
|
337 |
28eb4a57
|
laforge
|
opcd_rc632_reg_read(NULL, RC632_REG_INTERRUPT_RQ, &cause);
|
338 |
f57b548d
|
(no author)
|
|
339 |
|
|
/* ACK all interrupts */
|
340 |
28eb4a57
|
laforge
|
//rc632_reg_write(NULL, RC632_REG_INTERRUPT_RQ, cause);
|
341 |
|
|
opcd_rc632_reg_write(NULL, RC632_REG_INTERRUPT_RQ, RC632_INT_TIMER);
|
342 |
f7d6875c
|
(no author)
|
DEBUGP("rc632_irq: ");
|
343 |
f57b548d
|
(no author)
|
|
344 |
|
|
if (cause & RC632_INT_LOALERT) {
|
345 |
|
|
/* FIFO is getting low, refill from virtual FIFO */
|
346 |
327d426e
|
(no author)
|
DEBUGP("FIFO_low ");
|
347 |
f7d6875c
|
(no author)
|
#if 0
|
348 |
8a863d16
|
(no author)
|
if (!fifo_available(&rc632.fifo))
|
349 |
|
|
return;
|
350 |
f7d6875c
|
(no author)
|
#endif
|
351 |
8a863d16
|
(no author)
|
/* FIXME */
|
352 |
f57b548d
|
(no author)
|
}
|
353 |
|
|
if (cause & RC632_INT_HIALERT) {
|
354 |
|
|
/* FIFO is getting full, empty into virtual FIFO */
|
355 |
327d426e
|
(no author)
|
DEBUGP("FIFO_high ");
|
356 |
8a863d16
|
(no author)
|
/* FIXME */
|
357 |
f57b548d
|
(no author)
|
}
|
358 |
327d426e
|
(no author)
|
/* All interrupts below can be reported directly to the host */
|
359 |
|
|
if (cause & RC632_INT_TIMER)
|
360 |
|
|
DEBUGP("Timer ");
|
361 |
|
|
if (cause & RC632_INT_IDLE)
|
362 |
|
|
DEBUGP("Idle ");
|
363 |
|
|
if (cause & RC632_INT_RX)
|
364 |
|
|
DEBUGP("RxComplete ");
|
365 |
|
|
if (cause & RC632_INT_TX)
|
366 |
|
|
DEBUGP("TxComplete ");
|
367 |
|
|
|
368 |
7cffc967
|
(no author)
|
|
369 |
514b0f72
|
laforge
|
irq_rctx = req_ctx_find_get(0, RCTX_STATE_FREE,
|
370 |
7cffc967
|
(no author)
|
RCTX_STATE_RC632IRQ_BUSY);
|
371 |
|
|
if (!irq_rctx) {
|
372 |
28eb4a57
|
laforge
|
DEBUGPCRF("NO RCTX!");
|
373 |
7cffc967
|
(no author)
|
/* disable rc632 interrupt until RCTX is free */
|
374 |
|
|
AT91F_AIC_DisableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
|
375 |
|
|
return;
|
376 |
|
|
}
|
377 |
|
|
|
378 |
514b0f72
|
laforge
|
irq_opcdh = (struct openpcd_hdr *) irq_rctx->data;
|
379 |
7cffc967
|
(no author)
|
|
380 |
|
|
/* initialize static part of openpcd_hdr for USB IRQ reporting */
|
381 |
|
|
irq_opcdh->cmd = OPENPCD_CMD_IRQ;
|
382 |
|
|
irq_opcdh->flags = 0x00;
|
383 |
|
|
irq_opcdh->reg = 0x07;
|
384 |
|
|
irq_opcdh->val = cause;
|
385 |
327d426e
|
(no author)
|
|
386 |
7cffc967
|
(no author)
|
req_ctx_set_state(irq_rctx, RCTX_STATE_UDP_EP3_PENDING);
|
387 |
|
|
DEBUGPCR("");
|
388 |
|
|
}
|
389 |
|
|
|
390 |
|
|
void rc632_unthrottle(void)
|
391 |
|
|
{
|
392 |
|
|
AT91F_AIC_EnableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
|
393 |
f7d6875c
|
(no author)
|
}
|
394 |
|
|
|
395 |
373c172a
|
Harald Welte
|
void rc632_power(uint8_t up)
|
396 |
a5a204c6
|
(no author)
|
{
|
397 |
c7367692
|
(no author)
|
DEBUGPCRF("powering %s RC632", up ? "up" : "down");
|
398 |
a5a204c6
|
(no author)
|
if (up)
|
399 |
caf50003
|
(no author)
|
AT91F_PIO_ClearOutput(AT91C_BASE_PIOA,
|
400 |
|
|
OPENPCD_PIO_RC632_RESET);
|
401 |
a5a204c6
|
(no author)
|
else
|
402 |
caf50003
|
(no author)
|
AT91F_PIO_SetOutput(AT91C_BASE_PIOA,
|
403 |
|
|
OPENPCD_PIO_RC632_RESET);
|
404 |
a5a204c6
|
(no author)
|
}
|
405 |
|
|
|
406 |
f7d6875c
|
(no author)
|
void rc632_reset(void)
|
407 |
|
|
{
|
408 |
9d0d7022
|
(no author)
|
volatile int i;
|
409 |
0dca1ae7
|
(no author)
|
|
410 |
a5a204c6
|
(no author)
|
rc632_power(0);
|
411 |
5f19aeb0
|
(no author)
|
for (i = 0; i < 0xffff; i++)
|
412 |
0dca1ae7
|
(no author)
|
{}
|
413 |
a5a204c6
|
(no author)
|
rc632_power(1);
|
414 |
5f19aeb0
|
(no author)
|
|
415 |
|
|
/* wait for startup phase to finish */
|
416 |
|
|
while (1) {
|
417 |
373c172a
|
Harald Welte
|
uint8_t val;
|
418 |
28eb4a57
|
laforge
|
opcd_rc632_reg_read(NULL, RC632_REG_COMMAND, &val);
|
419 |
5f19aeb0
|
(no author)
|
if (val == 0x00)
|
420 |
|
|
break;
|
421 |
|
|
}
|
422 |
0dca1ae7
|
(no author)
|
|
423 |
|
|
/* turn off register paging */
|
424 |
28eb4a57
|
laforge
|
opcd_rc632_reg_write(NULL, RC632_REG_PAGE0, 0x00);
|
425 |
f57b548d
|
(no author)
|
}
|
426 |
|
|
|
427 |
81416e6a
|
(no author)
|
static int rc632_usb_in(struct req_ctx *rctx)
|
428 |
|
|
{
|
429 |
514b0f72
|
laforge
|
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
|
430 |
373c172a
|
Harald Welte
|
uint16_t len = rctx->tot_len-sizeof(*poh);
|
431 |
81416e6a
|
(no author)
|
|
432 |
706ffa9f
|
laforge
|
/* initialize transmit length to header length */
|
433 |
|
|
rctx->tot_len = sizeof(*poh);
|
434 |
|
|
|
435 |
81416e6a
|
(no author)
|
switch (poh->cmd) {
|
436 |
|
|
case OPENPCD_CMD_READ_REG:
|
437 |
28eb4a57
|
laforge
|
opcd_rc632_reg_read(NULL, poh->reg, &poh->val);
|
438 |
514b0f72
|
laforge
|
DEBUGP("READ REG(0x%02x)=0x%02x ", poh->reg, poh->val);
|
439 |
|
|
/* register read always has to provoke a response */
|
440 |
|
|
poh->flags &= OPENPCD_FLAG_RESPOND;
|
441 |
81416e6a
|
(no author)
|
break;
|
442 |
|
|
case OPENPCD_CMD_READ_FIFO:
|
443 |
514b0f72
|
laforge
|
/* FIFO read always has to provoke a response */
|
444 |
|
|
poh->flags &= OPENPCD_FLAG_RESPOND;
|
445 |
81416e6a
|
(no author)
|
{
|
446 |
373c172a
|
Harald Welte
|
uint16_t req_len = poh->val, remain_len = req_len, pih_len;
|
447 |
706ffa9f
|
laforge
|
#if 0
|
448 |
81416e6a
|
(no author)
|
if (req_len > MAX_PAYLOAD_LEN) {
|
449 |
|
|
pih_len = MAX_PAYLOAD_LEN;
|
450 |
|
|
remain_len -= pih_len;
|
451 |
28eb4a57
|
laforge
|
opcd_rc632_fifo_read(NULL, pih_len, poh->data);
|
452 |
514b0f72
|
laforge
|
rctx->tot_len += pih_len;
|
453 |
81416e6a
|
(no author)
|
DEBUGP("READ FIFO(len=%u)=%s ", req_len,
|
454 |
514b0f72
|
laforge
|
hexdump(poh->data, pih_len));
|
455 |
81416e6a
|
(no author)
|
req_ctx_set_state(rctx, RCTX_STATE_UDP_EP2_PENDING);
|
456 |
514b0f72
|
laforge
|
udp_refill_ep(2);
|
457 |
81416e6a
|
(no author)
|
|
458 |
|
|
/* get and initialize second rctx */
|
459 |
514b0f72
|
laforge
|
rctx = req_ctx_find_get(0, RCTX_STATE_FREE,
|
460 |
81416e6a
|
(no author)
|
RCTX_STATE_MAIN_PROCESSING);
|
461 |
|
|
if (!rctx) {
|
462 |
|
|
DEBUGPCRF("FATAL_NO_RCTX!!!\n");
|
463 |
|
|
break;
|
464 |
|
|
}
|
465 |
514b0f72
|
laforge
|
poh = (struct openpcd_hdr *) rctx->data;
|
466 |
|
|
rctx->tot_len = sizeof(*poh);
|
467 |
81416e6a
|
(no author)
|
|
468 |
|
|
pih_len = remain_len;
|
469 |
28eb4a57
|
laforge
|
opcd_rc632_fifo_read(NULL, pih_len, poh->data);
|
470 |
514b0f72
|
laforge
|
rctx->tot_len += pih_len;
|
471 |
81416e6a
|
(no author)
|
DEBUGP("READ FIFO(len=%u)=%s ", pih_len,
|
472 |
514b0f72
|
laforge
|
hexdump(poh->data, pih_len));
|
473 |
81416e6a
|
(no author)
|
/* don't set state of second rctx, main function
|
474 |
|
|
* body will do this after switch statement */
|
475 |
|
|
} else {
|
476 |
706ffa9f
|
laforge
|
#endif
|
477 |
28eb4a57
|
laforge
|
poh->val = opcd_rc632_fifo_read(NULL, req_len, poh->data);
|
478 |
706ffa9f
|
laforge
|
rctx->tot_len += poh->val;
|
479 |
81416e6a
|
(no author)
|
DEBUGP("READ FIFO(len=%u)=%s ", poh->val,
|
480 |
514b0f72
|
laforge
|
hexdump(poh->data, poh->val));
|
481 |
706ffa9f
|
laforge
|
//}
|
482 |
81416e6a
|
(no author)
|
}
|
483 |
514b0f72
|
laforge
|
break;
|
484 |
81416e6a
|
(no author)
|
case OPENPCD_CMD_WRITE_REG:
|
485 |
|
|
DEBUGP("WRITE_REG(0x%02x, 0x%02x) ", poh->reg, poh->val);
|
486 |
28eb4a57
|
laforge
|
opcd_rc632_reg_write(NULL, poh->reg, poh->val);
|
487 |
81416e6a
|
(no author)
|
break;
|
488 |
6a189e61
|
laforge
|
case OPENPCD_CMD_WRITE_REG_SET:
|
489 |
|
|
DEBUGP("WRITE_REG_SET(%s) ", hexdump(poh->data, len));
|
490 |
28eb4a57
|
laforge
|
opcd_rc632_reg_write_set(NULL, poh->data, len);
|
491 |
6a189e61
|
laforge
|
break;
|
492 |
81416e6a
|
(no author)
|
case OPENPCD_CMD_WRITE_FIFO:
|
493 |
86c8ee95
|
(no author)
|
DEBUGP("WRITE FIFO(len=%u): %s ", len,
|
494 |
|
|
hexdump(poh->data, len));
|
495 |
28eb4a57
|
laforge
|
opcd_rc632_fifo_write(NULL, len, poh->data, 0);
|
496 |
81416e6a
|
(no author)
|
break;
|
497 |
|
|
case OPENPCD_CMD_READ_VFIFO:
|
498 |
|
|
DEBUGP("READ VFIFO ");
|
499 |
514b0f72
|
laforge
|
goto not_impl;
|
500 |
81416e6a
|
(no author)
|
break;
|
501 |
|
|
case OPENPCD_CMD_WRITE_VFIFO:
|
502 |
|
|
DEBUGP("WRITE VFIFO ");
|
503 |
514b0f72
|
laforge
|
goto not_impl;
|
504 |
81416e6a
|
(no author)
|
break;
|
505 |
|
|
case OPENPCD_CMD_REG_BITS_CLEAR:
|
506 |
|
|
DEBUGP("CLEAR BITS ");
|
507 |
28eb4a57
|
laforge
|
poh->val = opcd_rc632_clear_bits(NULL, poh->reg, poh->val);
|
508 |
81416e6a
|
(no author)
|
break;
|
509 |
|
|
case OPENPCD_CMD_REG_BITS_SET:
|
510 |
|
|
DEBUGP("SET BITS ");
|
511 |
28eb4a57
|
laforge
|
poh->val = opcd_rc632_set_bits(NULL, poh->reg, poh->val);
|
512 |
81416e6a
|
(no author)
|
break;
|
513 |
|
|
case OPENPCD_CMD_DUMP_REGS:
|
514 |
|
|
DEBUGP("DUMP REGS ");
|
515 |
514b0f72
|
laforge
|
goto not_impl;
|
516 |
81416e6a
|
(no author)
|
break;
|
517 |
|
|
default:
|
518 |
|
|
DEBUGP("UNKNOWN ");
|
519 |
57d818a3
|
laforge
|
return USB_ERR(USB_ERR_CMD_UNKNOWN);
|
520 |
81416e6a
|
(no author)
|
}
|
521 |
|
|
|
522 |
514b0f72
|
laforge
|
return (poh->flags & OPENPCD_FLAG_RESPOND) ? USB_RET_RESPOND : 0;
|
523 |
|
|
not_impl:
|
524 |
|
|
DEBUGP("NOT IMPLEMENTED YET ");
|
525 |
|
|
return USB_ERR(USB_ERR_CMD_NOT_IMPL);
|
526 |
81416e6a
|
(no author)
|
}
|
527 |
|
|
|
528 |
f57b548d
|
(no author)
|
void rc632_init(void)
|
529 |
|
|
{
|
530 |
41333333
|
(no author)
|
//fifo_init(&rc632.fifo, 256, NULL, &rc632);
|
531 |
8a863d16
|
(no author)
|
|
532 |
2c303468
|
(no author)
|
DEBUGPCRF("entering");
|
533 |
c7367692
|
(no author)
|
|
534 |
f57b548d
|
(no author)
|
AT91F_SPI_CfgPMC();
|
535 |
|
|
|
536 |
41333333
|
(no author)
|
AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA,
|
537 |
|
|
AT91C_PA11_NPCS0|AT91C_PA12_MISO|
|
538 |
|
|
AT91C_PA13_MOSI |AT91C_PA14_SPCK, 0);
|
539 |
|
|
|
540 |
327d426e
|
(no author)
|
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_SPI,
|
541 |
|
|
OPENPCD_IRQ_PRIO_SPI,
|
542 |
f57b548d
|
(no author)
|
AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &spi_irq);
|
543 |
|
|
AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_SPI);
|
544 |
caf50003
|
(no author)
|
|
545 |
880465ce
|
(no author)
|
AT91F_SPI_EnableIt(pSPI, AT91C_SPI_MODF|AT91C_SPI_OVRES);
|
546 |
caf50003
|
(no author)
|
#ifdef SPI_USES_DMA
|
547 |
|
|
AT91F_SPI_EnableIt(pSPI, AT91C_SPI_ENDRX|AT91C_SPI_ENDTX);
|
548 |
|
|
#endif
|
549 |
|
|
|
550 |
|
|
#ifdef SPI_DEBUG_LOOPBACK
|
551 |
9d0d7022
|
(no author)
|
AT91F_SPI_CfgMode(pSPI, AT91C_SPI_MSTR|AT91C_SPI_PS_FIXED|
|
552 |
|
|
AT91C_SPI_MODFDIS|AT91C_SPI_LLB);
|
553 |
caf50003
|
(no author)
|
#else
|
554 |
9d0d7022
|
(no author)
|
AT91F_SPI_CfgMode(pSPI, AT91C_SPI_MSTR|AT91C_SPI_PS_FIXED|
|
555 |
|
|
AT91C_SPI_MODFDIS);
|
556 |
caf50003
|
(no author)
|
#endif
|
557 |
872a81da
|
(no author)
|
/* CPOL = 0, NCPHA = 1, CSAAT = 0, BITS = 0000, SCBR = 10 (4.8MHz),
|
558 |
f57b548d
|
(no author)
|
* DLYBS = 0, DLYBCT = 0 */
|
559 |
5f19aeb0
|
(no author)
|
#ifdef SPI_USES_DMA
|
560 |
|
|
AT91F_SPI_CfgCs(pSPI, 0, AT91C_SPI_BITS_8|AT91C_SPI_NCPHA|(10<<8));
|
561 |
|
|
#else
|
562 |
|
|
/* 320 kHz in case of I/O based SPI */
|
563 |
880465ce
|
(no author)
|
AT91F_SPI_CfgCs(pSPI, 0, AT91C_SPI_BITS_8|AT91C_SPI_NCPHA|(0x7f<<8));
|
564 |
5f19aeb0
|
(no author)
|
#endif
|
565 |
9d0d7022
|
(no author)
|
AT91F_SPI_Enable(pSPI);
|
566 |
41333333
|
(no author)
|
|
567 |
872a81da
|
(no author)
|
/* Register rc632_irq */
|
568 |
caf50003
|
(no author)
|
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632,
|
569 |
327d426e
|
(no author)
|
OPENPCD_IRQ_PRIO_RC632,
|
570 |
f7d6875c
|
(no author)
|
AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &rc632_irq);
|
571 |
9d0d7022
|
(no author)
|
AT91F_AIC_EnableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
|
572 |
f7d6875c
|
(no author)
|
|
573 |
caf50003
|
(no author)
|
AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, OPENPCD_PIO_RC632_RESET);
|
574 |
9d0d7022
|
(no author)
|
|
575 |
a5a204c6
|
(no author)
|
rc632_reset();
|
576 |
9d0d7022
|
(no author)
|
|
577 |
7cffc967
|
(no author)
|
/* configure IRQ pin */
|
578 |
28eb4a57
|
laforge
|
opcd_rc632_reg_write(NULL, RC632_REG_IRQ_PIN_CONFIG,
|
579 |
|
|
RC632_IRQCFG_CMOS|RC632_IRQCFG_INV);
|
580 |
7cffc967
|
(no author)
|
/* enable interrupts */
|
581 |
28eb4a57
|
laforge
|
opcd_rc632_reg_write(NULL, RC632_REG_INTERRUPT_EN, RC632_INT_TIMER);
|
582 |
7cffc967
|
(no author)
|
|
583 |
9d0d7022
|
(no author)
|
/* configure AUX to test signal four */
|
584 |
28eb4a57
|
laforge
|
opcd_rc632_reg_write(NULL, RC632_REG_TEST_ANA_SELECT, 0x04);
|
585 |
7cffc967
|
(no author)
|
|
586 |
81416e6a
|
(no author)
|
usb_hdlr_register(&rc632_usb_in, OPENPCD_CMD_CLS_RC632);
|
587 |
f57b548d
|
(no author)
|
};
|
588 |
|
|
|
589 |
9d0d7022
|
(no author)
|
#if 0
|
590 |
f57b548d
|
(no author)
|
void rc632_exit(void)
|
591 |
|
|
{
|
592 |
81416e6a
|
(no author)
|
usb_hdlr_unregister(OPENPCD_CMD_CLS_RC632);
|
593 |
9d0d7022
|
(no author)
|
AT91F_AIC_DisableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
|
594 |
872a81da
|
(no author)
|
AT91F_AIC_DisableIt(AT91C_BASE_AIC, AT91C_ID_SPI);
|
595 |
8a863d16
|
(no author)
|
AT91F_SPI_Disable(pSPI);
|
596 |
f57b548d
|
(no author)
|
}
|
597 |
9d0d7022
|
(no author)
|
#endif
|
598 |
0dca1ae7
|
(no author)
|
|
599 |
|
|
#ifdef DEBUG
|
600 |
dd0638d2
|
(no author)
|
static int rc632_reg_write_verify(struct rfid_asic_handle *hdl,
|
601 |
373c172a
|
Harald Welte
|
uint8_t reg, uint8_t val)
|
602 |
0dca1ae7
|
(no author)
|
{
|
603 |
373c172a
|
Harald Welte
|
uint8_t tmp;
|
604 |
0dca1ae7
|
(no author)
|
|
605 |
28eb4a57
|
laforge
|
opcd_rc632_reg_write(hdl, reg, val);
|
606 |
|
|
opcd_rc632_reg_read(hdl, reg, &tmp);
|
607 |
0dca1ae7
|
(no author)
|
|
608 |
c7367692
|
(no author)
|
DEBUGPCRF("reg=0x%02x, write=0x%02x, read=0x%02x ", reg, val, tmp);
|
609 |
0dca1ae7
|
(no author)
|
|
610 |
|
|
return (val == tmp);
|
611 |
|
|
}
|
612 |
|
|
|
613 |
|
|
int rc632_dump(void)
|
614 |
|
|
{
|
615 |
373c172a
|
Harald Welte
|
uint8_t i;
|
616 |
|
|
uint16_t rx_len = sizeof(spi_inbuf);
|
617 |
0dca1ae7
|
(no author)
|
|
618 |
|
|
for (i = 0; i <= 0x3f; i++) {
|
619 |
373c172a
|
Harald Welte
|
uint8_t reg = i;
|
620 |
3221ecd8
|
(no author)
|
if (reg == RC632_REG_FIFO_DATA)
|
621 |
|
|
reg = 0x3e;
|
622 |
|
|
|
623 |
|
|
spi_outbuf[i] = reg << 1;
|
624 |
9d0d7022
|
(no author)
|
spi_inbuf[i] = 0x00;
|
625 |
0dca1ae7
|
(no author)
|
}
|
626 |
|
|
|
627 |
|
|
/* MSB of first byte of read spi transfer is high */
|
628 |
9d0d7022
|
(no author)
|
spi_outbuf[0] |= 0x80;
|
629 |
0dca1ae7
|
(no author)
|
|
630 |
|
|
/* last byte of read spi transfer is 0x00 */
|
631 |
9d0d7022
|
(no author)
|
spi_outbuf[0x40] = 0x00;
|
632 |
|
|
spi_inbuf[0x40] = 0x00;
|
633 |
0dca1ae7
|
(no author)
|
|
634 |
9d0d7022
|
(no author)
|
spi_transceive(spi_outbuf, 0x41, spi_inbuf, &rx_len);
|
635 |
0dca1ae7
|
(no author)
|
|
636 |
3221ecd8
|
(no author)
|
for (i = 0; i < 0x3f; i++) {
|
637 |
|
|
if (i == RC632_REG_FIFO_DATA)
|
638 |
|
|
DEBUGPCR("REG 0x02 = NOT READ");
|
639 |
|
|
else
|
640 |
|
|
DEBUGPCR("REG 0x%02x = 0x%02x", i, spi_inbuf[i+1]);
|
641 |
|
|
}
|
642 |
0dca1ae7
|
(no author)
|
|
643 |
|
|
return 0;
|
644 |
|
|
}
|
645 |
|
|
|
646 |
dd0638d2
|
(no author)
|
int rc632_test(struct rfid_asic_handle *hdl)
|
647 |
0dca1ae7
|
(no author)
|
{
|
648 |
dd0638d2
|
(no author)
|
if (rc632_reg_write_verify(hdl, RC632_REG_RX_WAIT, 0x55) != 1)
|
649 |
0dca1ae7
|
(no author)
|
return -1;
|
650 |
|
|
|
651 |
dd0638d2
|
(no author)
|
if (rc632_reg_write_verify(hdl, RC632_REG_RX_WAIT, 0xAA) != 1)
|
652 |
0dca1ae7
|
(no author)
|
return -1;
|
653 |
|
|
|
654 |
|
|
return 0;
|
655 |
|
|
}
|
656 |
fe4d6ec2
|
(no author)
|
#else /* DEBUG */
|
657 |
5f19aeb0
|
(no author)
|
int rc632_test(struct rfid_asic_handle *hdl) {}
|
658 |
0dca1ae7
|
(no author)
|
int rc632_dump(void) {}
|
659 |
fe4d6ec2
|
(no author)
|
#endif /* DEBUG */
|