Auerswald COMmander Basic2 Electronics¶
Mainboard¶As we can see, there are the following main components:
- Digi International NS9360 ARM926 SoC (NS9360.pdf) with SDRAM (2x Samsung K4S281632I-UC75) + Flash (ST NAND512W3A2BN6)
- this is where the Linux_on_Auerswald_Commander_Basic_2 runs
- StrongARM peripheral: IC+ IP101A Ethernet PHY
- TI TMS320VC5501 DSP (tms320vc5501.pdf) with its own RAM (ISSI IS61LV641G-10TL)
- Lattice LFEC1E programmable logic for interfacing with the bus/backplane
- various smaller bus latches/drivers
8 S0 Module¶
As can be seen clearly on the picutre, it uses the CologneChip HFC-8S 8-port S/T interface IC. There's a lattice glue logic chip for interfacing with the backplane bus, and the analog frontend + magnetics sections for 8 ports. Four ports have jumper blocks to change the NT/TE cross-over, while the other 4 ports are static.
4 S0 Module¶
This is basically just a partially populated 8S0 module, using a HFC-4S chip instead of the HFC-8S.
8 a/b Module¶
This is a design around the following two Infineon PEB 2466H SICOFI4-µC Four Channel Codec Filter with PCM and Microcontroller Interface, datasheet at PEB,PEF 2466 Hardware Ref Manual.pdf
The bus glue / attachment is done with discrete logic using chips of the 74HCxxx series.The analog line interface features
- MC34074 operational amplifier, datasheet at MC34071-D.PDF
- MOC3023X opto-coupler with triac output, datasheet at MOC3023X.pdf
The S2M (PRI) module is centered around an Infineon PEF2256E FALC56 E1/T1/J1 Framer and Line Interface chip, datasheet is at PEF-2256.pdf. This is one of the most common E1 framers on the market.
The glue logic for interfacing with the backplane/bus is implemented in a Xilinx CPLD.