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GsmDevelBoardGsmDevelBoardFPGA » History » Version 3

laforge, 02/19/2016 10:48 PM

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= The FPGA on the GSM Development Board =
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== Functional Blocks ==
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=== CLK13GEN ===
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The 13MHz master clock generator.  We feed the 26MHz clock as generated by the [wiki:TRF6151] VCTCXO into the FPGA and want a 13MHz clock as result.
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=== TPU ===
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The purpose of the TPU is to pre-configure certain events to happen synchronous to a certain time.  ''Time'' in this context means
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a clock ticking at a rate of CLK_QBIT.
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==== TPU CLK_QBIT ====
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CLK_QBIT = CLK_13M/12 equals 923.1ns, which is a quarter of a GSM bit.
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This clock has to be generated internally by a divider.
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==== Actual TPU ====
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In the TI DBB, the TPU is a micro-programmable engine with an instruction set of 5 instructions.
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Each instruction takes four phases (FETCH, STORE, DECODE, EXECUTE).  As all of the phases have to complete in CLC_QBIT,
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the engine is clocked at four times this clock, i.e. CLK_13M/3.
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We don't really care how many phases/stages the engine has.  We simply need something that we can program to execute an event at a scheduled time.
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==== TPU Requirements ====
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The TPU needs to drive the [wiki:TimeSerialPort Time Serial Port] for the [wiki:TWL3025] and [wiki:TRF6151], as well as some parallel I/O lines.
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 * serial output
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  * CLK13M is the global 13MHz clock generated by CLK13GEN.
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   * As CLK13GEN already exports this from the FPGA, no need for the TPU to export it again
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  * TRF6151:STROBE -- the strobe signal for the [wiki:TRF6151] TSP
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  * TWL3025:TEN -- the TSP ENable signal for the [wiki:TWL3025] TSP
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  * TSP_DO -- the TSP Data Out signal, connected to TWL3025:TDR and TRF6151:DATA
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 * parallel output
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  * TSPACT0 -- connected to the [wiki:TRF6151]:RESETz signal
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  * TSPACT1 -- connected to the [wiki:ASM4532]:VC2 signal
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  * TSPACT2 -- connected to the [wiki:ASM4532]:VC1 signal
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  * TSPACT3 -- connected to the [wiki:RF3166]:BAND_SELECT signal
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  * TSPACT4 -- connected to the [wiki:ASM4532]:VC3 signal
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  * TSPACT9 -- connected to the [wiki:RF3166]:TX_ENABLE signal
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==== TSP of TRF6151 ====
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The TSP to the TRF6151 uses three wires:
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 * CLOCK (regular CLK_13M)
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 * STROBE (generated by TPU)
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 * DATA (provided by TPU at falling edge of CLOCK, TRF samples data at rising edge of CLOCK)
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See [wiki:Rita] for a more detailed description of the TSP timings required.
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==== TSP of TWL3025 ====
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The TSP of the TWL3025 usese three wires:
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 * CLOCK (regular CLK_13M), the TSL3025 derives an internal CLK6.5 signal of half the clock rate and uses it for the TSP)
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 * nTEN (TSP ENable)
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 * TDR (sampled by TWL3025 at rising edge of CLK6.5)
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See [wiki:Iota] for a more detailed description of the TSP timings required.
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