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UmTRX » History » Version 5

Anonymous, 02/19/2016 10:52 PM

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[[PageOutline]]
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= Welcome to the UmTRX project Developer Wiki =
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[[Image(UmTRX-scheme_simple-cropped-1024w.jpg,40%)]]
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UmTRX is a dual-channel wide-band SDR transceiver that is designed to be used with [http://wush.net/trac/rangepublic OpenBTS] and [http://openbsc.osmocom.org/trac/wiki/OsmoBTS OsmoBTS] GSM base stations. Given its SDR architecture UmTRX can easily be used with many other RF applications, and a combination of FPGA and FPRF (Field-Programmable RF) technology plus the ability to process data on a CPU or a DSP, makes it an extraordinarily flexible platform.
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UmTRX is connected to a host via gigabit Ethernet. The Fairwaves version of UHD provides FPGA HDL and firmware, along with a host driver.
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Laboratory packages and turnkey solutions are available from [http://fairwaves.ru/ Fairwaves].
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== Intro, user info and blog ==
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For a more detailed introduction, user information and the project blog, see [http://umtrx.org]
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== Developers ==
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 * Altium design files, BOM, PDF schematics and layout: {{{git clone https://github.com/fairwaves/umtrx-schematics.git}}}
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 * Fairwaves version of UHD: {{{git clone https://github.com/fairwaves/UHD-Fairwaves.git}}}
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 * LMS6002D transceiver IC documentation: {{{git clone https://github.com/myriadrf/LMS6002D-docs.git}}}
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 * Mailing list: [http://lists.osmocom.org/cgi-bin/mailman/listinfo/umtrx]
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   * [wiki:MailingListRules Mailing list rules]
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 * Roadmap
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   * [wiki:UmTRX_Roadmap UmTRX] 
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   * [wiki:UHD-Fairwaves_Roadmap UHD-Fairwaves]
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 * [wiki:Building_firmware Building firmware]
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== Licensing ==
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Altium Designer schematic and board layout files are made available under the Creative Commons Attribution-!ShareAlike 3.0 Unported license.
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FPGA HDL, and firmware and host driver sources are made available under the GPL v3 license.
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== Community ==
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UmTRX is an Osmocom project, and also a partner project of [http://myriadrf.org/ Myriad-RF].
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== Contributors ==
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* Alexander Chemeris — project leader
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* Andrey Sviyazov — hardware design
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* Sergey Kostanbaev — FPGA HDL
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* Andrey Sviyazov — initial host-side code
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* Sylvain Munaut — various improvements
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* Eric Wild — host-side code
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* Sergey Kostanbaev — debugging
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* Andrey Bakhmat — logo, diagrams and photos
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* Andrew Back — community management
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